S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 90

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
1
Port Integration Module (S12HYPIMV1)
2.3.28
2.3.29
This register configures the re-routing of IIC and SPI on alternative ports.
90
Address 0x024E
Address 0x024F
Read: Anytime.
Write: Anytime.
WOMS
Read: Anytime.
Write: Anytime.
PPSS
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port S pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A rising edge on the associated Port S pin sets the associated flag bit in the PIFS register. A pull-down device is
0 A falling edge on the associated Port S pin sets the associated flag bit in the PIFS register. A pull-up device is
Port S wired-or mode—Enable wired-or functionality
This register configures the output pins as wired-or. If enabled the output is driven active low only (open-drain). A
logic level of “1” is not driven.This allows a multipoint connection of several serial modules. These bits have no
influence on pins used as inputs.
1 Output buffers operate as open-drain outputs.
0 Output buffers operate as push-pull outputs.
WOMS7
Port S Wired-Or Mode Register (WOMS)
Port S Routing Register (PTSRR)
connected to the associated pin, if enabled and if the pin is used as input.
connected to the associated pin, if enabled and if the pin is used as input.
0
0
0
7
7
WOMS6
0
0
0
6
6
Figure 2-26. Port S Wired-Or Mode Register (WOMS)
Table 2-25. WOMS Register Field Descriptions
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 2-27. Port S Routing Register (PTSRR)
Table 2-24. PPSS Register Field Descriptions
PTSRR5
WOMS5
0
0
5
5
PTSRR4
WOMS4
0
0
4
4
Description
Description
WOMS3
3
0
3
0
0
WOMS2
0
0
0
2
2
PTSRR1
WOMS1
Freescale Semiconductor
Access: User read/write
Access: User read/write
0
0
1
1
PTSRR0
WOMS0
0
0
0
0
1
1