S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 78

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
1
Port Integration Module (S12HYPIMV1)
2.3.12
2.3.13
This register is reserved for factory testing of the PIM module and is not available in normal operation.
78
Address 0x001E
XIRQEN
Read: Always reads 0x00
Write: Unimplemented
Read: See individual bit descriptions below.
Write: See individual bit descriptions below.
IRQEN
IRQE
Field
Reset
7
6
5
W
R
IRQ select edge sensitive only—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 IRQ pin configured to respond only to falling edges. Falling edges on the IRQ pin will be detected anytime IRQE=1
0 IRQ pin configured for low level recognition
IRQ enable—
Read or write anytime.
1 IRQ pin is connected to interrupt logic
0 IRQ pin is disconnected from interrupt logic
XIRQ enable—
Special mode: Read or write anytime.
Normal mode: Read anytime, write once.
1 XIRQ pin is connected to interrupt logic
0 XIRQ pin is disconnected from interrupt logic
IRQE
IRQ Control Register (IRQCR)
PIM Reserved Register
and will be cleared only upon a reset or the servicing of the IRQ interrupt.
0
7
= Unimplemented or Reserved
IRQEN
0
6
Table 2-11. IRQCR Register Field Descriptions
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Figure 2-10. IRQ Control Register (IRQCR)
XIRQEN
0
5
0
0
4
Description
3
0
0
0
0
2
Freescale Semiconductor
Access: User read/write
0
0
1
0
0
0
1