S9S12HY64J0MLH Freescale Semiconductor, S9S12HY64J0MLH Datasheet - Page 49

• Manufacturer Part Number: S9S12HY64J0MLH
• Description: MCU 64K FLASH AUTO 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12HY64J0MLH

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: S12
• No. Of I/o's: 50
• Ram Memory Size: 4KB
• Cpu Speed: 64MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S12HY
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12HY64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1.11.3
When a reset occurs, MCU registers and control bits are initialized. Refer to the respective block sections
for register reset states.
On each reset, the Flash module executes a reset sequence to load Flash configuration registers.
1.11.3.1
On each reset, the Flash module will hold CPU activity while loading Flash module registers from the
Flash memory. If double faults are detected in the reset phase, Flash module protection and security may
be active on leaving reset. This is explained in more detail in the Flash module section.
1.11.3.2
If a reset occurs while any Flash command is in progress, that command will be immediately aborted. The
state of the word being programmed or the sector/block being erased is not guaranteed.
1.11.3.3
Refer to the PIM section for reset configurations of all peripheral module ports.
Freescale Semiconductor
1. 16 bits vector address based
Vector base + 0x9A
Vector base + 0x8E
Vector base + 0x8A
Vector base + 0x96
Vector base + 0x94
Vector base + 0x90
Vector base + 0x88
Vector base + 0x86
Vector base + 0x84
Vector base + 0x82
Vector base + 0x80
Vector base+ 0x9E
Vector base+ 0x9C
Vector base+ 0x8C
Vector Address
Vector base+ 0x98
Effects of Reset
Flash Configuration Reset Sequence Phase
Reset While Flash Command Active
I/O Pins
to
(1)
Table 1-12. Interrupt Vector Locations (Sheet 3 of 3)
Autonomous periodical interrupt (API)
TIM1 Pulse accumulator A overflow
TIM1 Pulse accumulator input edge
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
Motor Control Timer Overflow
PWM emergency shutdown
High Temperature Interrupt
Low-voltage interrupt (LVI)
ATD Compare Interrupt
TIM1 timer overflow
Spurious interrupt
Interrupt Source
Port T
Reserved
Reserved
Reserved
Mask
CCR
I-Bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
—
Device Overview MC9S12HY/HA-Family
CPMUAPICTRL (APIE)
TIM1PACTL (PAOVI)
PIET (PIET7-PIET0)
ATDCTL2 (ACMPIE)
MCCTL1 (MCOCIE)
PWMSDN (PWMIE)
CPMUHTCL (HTIE)
CPMUCTRL (LVIE)
TIM1TSRC2 (TOI)
TIM1PACTL (PAI)
Local Enable
None
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