D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 312

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

Section 7 DMA Controller (DMAC)
7.5.4
Repeat mode can be specified by setting the RPE bit in DMACR to 1, and clearing the DTIE bit in
DMABCRL to 0. In repeat mode, MAR is updated after each byte or word transfer in response to
a single transfer request, and this is executed the number of times specified in ETCRL. On
completion of the specified number of transfers, MAR and ETCRL are automatically restored to
their original settings and operation continues. One address is specified by MAR, and the other by
IOAR. The transfer direction can be specified by the DTDIR bit in DMACR. Table 7.7
summarizes register functions in repeat mode.
Table 7.7
Register
MAR specifies the start address of the transfer source or transfer destination as 24 bits. MAR is
incremented or decremented by 1 or 2 each time a byte or word is transferred. IOAR specifies the
lower 16 bits of the other address. The upper 8 bits of IOAR have a value of H'FF. The number of
transfers is specified as 8 bits by ETCRH and ETCRL. The maximum number of transfers, when
H'00 is set in both ETCRH and ETCRL, is 256.
In repeat mode, ETCRL functions as the transfer counter, and ETCRH is used to hold the number
of transfers. ETCRL is decremented by 1 each time a data transfer is executed, and when its value
reaches H'00, it is loaded with the value in ETCRH. At the same time, the value set in MAR is
Rev.6.00 Mar. 18, 2009 Page 252 of 980
REJ09B0050-0600
23
23
H'FF
Repeat Mode
15
7
7
ETCRH
ETCRL
Register Functions in Repeat Mode
MAR
IOAR
0
0
0
0
DTDIR = 0 DTDIR = 1 Initial Setting
Source
address
register
Destination
address
register
Holds number of
transfers
Transfer counter
Function
Destination
address
register
Source
address
register
Start address of
transfer destination
or transfer source
Start address of
transfer source or
transfer destination
Number of transfers
Number of transfers
Operation
Incremented/
decremented every
transfer.
Initial setting is
restored when value
reaches H'0000
Fixed
Fixed
Decremented every
transfer.
Loaded with ETCRH
value when count
reaches H'00