D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 36

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

15.5 Interrupt Request............................................................................................................... 658
15.6 Bit Synchronous Circuit.................................................................................................... 658
15.7 Usage Notes ...................................................................................................................... 659
Section 16 A/D Converter
16.1 Features............................................................................................................................. 661
16.2 Input/Output Pins .............................................................................................................. 663
16.3 Register Descriptions ........................................................................................................ 664
16.4 Operation .......................................................................................................................... 669
16.5 Interrupts........................................................................................................................... 673
16.6 A/D Conversion Precision Definitions.............................................................................. 674
16.7 Usage Notes ...................................................................................................................... 676
Section 17 D/A Converter
17.1 Features............................................................................................................................. 681
17.2 Input/Output Pins .............................................................................................................. 683
17.3 Register Descriptions ........................................................................................................ 683
17.4 Operation .......................................................................................................................... 685
17.5 Usage Notes ...................................................................................................................... 686
Rev.6.00 Mar. 18, 2009 Page xxxiv of lviii
REJ09B0050-0600
15.4.2 Master Transmit Operation .................................................................................. 644
15.4.3 Master Receive Operation.................................................................................... 646
15.4.4 Slave Transmit Operation .................................................................................... 648
15.4.5 Slave Receive Operation...................................................................................... 650
15.4.6 Noise Canceler..................................................................................................... 653
15.4.7 Example of Use.................................................................................................... 653
16.3.1 A/D Data Registers A to H (ADDRA to ADDRH) ............................................. 664
16.3.2 A/D Control/Status Register (ADCSR) ............................................................... 666
16.3.3 A/D Control Register (ADCR) ............................................................................ 668
16.4.1 Single Mode......................................................................................................... 669
16.4.2 Scan Mode ........................................................................................................... 669
16.4.3 Input Sampling and A/D Conversion Time ......................................................... 670
16.4.4 External Trigger Input Timing............................................................................. 673
16.7.1 Module Stop Mode Setting .................................................................................. 676
16.7.2 Permissible Signal Source Impedance ................................................................. 676
16.7.3 Influences on Absolute Precision......................................................................... 677
16.7.4 Setting Range of Analog Power Supply and Other Pins ...................................... 677
16.7.5 Notes on Board Design ........................................................................................ 677
16.7.6 Notes on Noise Countermeasures ........................................................................ 678
17.3.1 D/A Data Registers 2 and 3 (DADR2 and DADR3)............................................ 683
17.3.2 D/A Control Register 23 (DACR23) ................................................................... 684
................................................................................................. 661
................................................................................................. 681