D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 91

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

2.4.2
This 24-bit counter indicates the address of the next instruction the CPU will execute. The length
of all CPU instructions is 2 bytes (one word), so the least significant PC bit is ignored. (When an
instruction is fetched for read, the least significant PC bit is regarded as 0.)
2.4.3
EXR is an 8-bit register that can be operated by the LDC, STC, ANDC, ORC, and XORC
instructions. When an instruction other than STC is executed, all interrupts including NMI are
masked in three states after the instruction is completed.
Bit
7
6 to
3
2 to 0 I2
Bit Name
T
–
I1
I0
Program Counter (PC)
Extended Control Register (EXR)
Initial Value R/W
0
All 1
1
SP (ER7)
R/W
–
R/W
Figure 2.8 Stack
Description
Trace Bit
When this bit is set to 1, trace exception processing
starts every when an instruction is executed. When
this bit is cleared to 0, instructions are consecutively
executed.
Reserved
These bits are always read as 1.
Interrupt Mask Bits 2 to 0
Specify interrupt request mask levels (0 to 7). For
details, see section 5, Interrupt Controller.
Rev.6.00 Mar. 18, 2009 Page 31 of 980
Stack area
Free area
REJ09B0050-0600
Section 2 CPU