M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 145

IC M16C MCU FLASH 100QFP

M306N4FGTFP

Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 13.13 Example of 16-bit Pulse Width Modulator Operation
Figure 13.14 Example of 8-bit Pulse Width Modulator Operation
Apr 14, 2006
Count source
Input signal to
TAiIN pin
Underflow signal of
8-bit prescaler
IR bit in TAiIC
register
i = 0 to 4
fj: Frequency of count source (f1, f2, f8, f32, fC32)
NOTES:
PWM pulse output
from TAiOUT pin
1. The 8-bit prescaler counts the count source.
2. The 8-bit pulse width modulator counts the output from the 8-bit prescaler underflow signal.
3. m = 00h to FFh; n = 00h to FEh.
4. This timing diagram is the following case.
PWM pulse output
from TAiOUT pin
IR bit in TAiIC
register
i = 0 to 4
fj: Frequency of count source (f1, f2, f8, f32, fC32)
NOTES:
Count source
Input signal to
TAiIN pin
TAi register = 0202h
Bits TAiTGH and TAiTGL in the ONSF or TRGSR register = 00b (TAiIN pin input)
The MR1 bit in the TAiMR register = 0 (falling edge)
The MR2 bit in the TAiMR register = 1 (trigger selected by bits TAiTGH and TAiTGL)
1. n = 0000h to FFFEh.
2. This timing diagram is the following case.
TAi register = 0003h
Bits TAiTGH and TAiTGL in the ONSF or TRGSR register = 00b (TAiIN pin input)
The MR1 bit in the TAiMR register = 1 (rising edge)
The MR2 bit in the TAiMR register = 1 (trigger selected by bits TAiTGH and TAiTGL)
page 121 of 376
(1)
(2)
"H"
"H"
"H"
"L"
"L"
"L"
1
0
"H"
"L"
"H"
"L"
1
0
Set to 0 upon accepting an interrupt request or by writing in program
Set to 0 upon accepting an interrupt request or by writing in program
Trigger is not generated by this signal
1 / fj ✕ (m + 1)
1 / fi
1 / fj
1 / fj ✕ (m + 1) ✕ (2 – 1)
1 / fj ✕ (m + 1) ✕ n
(2
n
16
– 1)
8
13. Timers

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