M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 382

IC M16C MCU FLASH 100QFP

M306N4FGTFP

Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
23.9.2 Special Modes
23.9.2.1 Special Mode 1 (I
23.9.2.2 Special Mode 2
23.9.2.3 Special Mode 4 (SIM Mode)
When generating start, stop and restart conditions, set the STSPSEL bit in the UiSMR4 register to 0
(start and stop conditions not output) and wait for more than half cycle of the transfer clock before setting
each condition generate bit (bits STAREQ, RSTAREQ, and STPREQ) from 0 (clear) to 1 (start).
If a low-level signal is applied to the NMI pin when the IVPCR1 bit in the TB2SC register = 1 (three-phase
output forcible cutoff by input on NMI pin enabled), pins RTS2 and CLK2 go to a high-impedance state.
A transmit interrupt request is generated by setting the U2IRS bit in the U2C1 register to 1 (transmission
completed) and U2ERE bit in the U2C1 register to 1 (error signal output) after reset. Therefore, when
using SIM mode, be sure to set the IR bit to 0 (no interrupt request) after setting these bits.
Apr 14, 2006
page 358 of 376
2
C Mode)
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23. Usage Notes

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