M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 290

IC M16C MCU FLASH 100QFP

M306N4FGTFP

Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 21.9 Block Erase Command
21.3.5.5 Block Erase Command
The block erase command erases each block.
By writing xx20h in the first bus cycle and xxD0h to the highest-order even address of a block in the
second bus cycle, an auto-erase operation (erase and verify) will start in the specified block.
The FMR00 bit in the FMR0 register indicates whether an auto-erase operation has been completed.
The FMR00 bit is set to 0 (busy) during auto-erasure and to 1 (ready) when the auto-erase operation is
completed.
After the completion of an auto-erase operation, the FMR07 bit in the FMR0 register indicates whether
or not the auto-erase operation has been completed as expected. (Refer to 21.3.8 Full Status Check.)
Figure 21.9 shows a flow chart of the Block Erase Command.
The lock bit protects each block from being programmed inadvertently. (Refer to 21.3.6 Data Protect
Function.)
In EW1 mode, do not execute this command on the block where the rewrite control program is allocated.
In EW0 mode, the MCU enters read status register mode as soon as an auto-erase operation starts. The
status register can be read. The SR7 bit in the status register is set to 0 at the same time an auto-erase
operation starts. It is set to 1 when an auto-erase operation is completed. The MCU remains in read status
register mode until the read array command or read lock bit status command is written. Also execute the
clear status register command and block erase command at least 3 times until an erase error is not
generated when an erase error is generated.
Apr 14, 2006
NOTES:
1.Write the command code and data to even addresses.
2.Refer to Figure 21.12 Full Status Check and Handling Procedure for Each Error.
3.Execute the clear status register command and block erase command at least 3 times
page 266 of 376
until an erase error is not generated when an erase error is generated.
Write xxD0h to the highest-order
block address
Write the command code xx20h
Block erase operation is
completed
Full status check
FMR00=1?
Start
YES
NO
(2) (3)
21. Flash Memory Version

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