M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 275

• Manufacturer Part Number: M306N4FGTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
21. Flash Memory Version
Aside from the on-chip flash memory, the flash memory version MCU has the same functions as the masked
ROM version.
In the flash memory version, the flash memory can perform in four rewrite mode: CPU rewrite mode, standard
serial I/O mode, parallel I/O mode, and CAN I/O mode.
Table 21.1 lists the Flash Memory Version Specifications. See Table 1.1 Functions and Specifications,
for the items not listed in Table 21.1. Table 21.2 shows the Flash Memory Rewrite Modes Overview.
Table 21.1 Flash Memory Version Specifications
NOTES:
Table 21.2 Flash Memory Rewrite Modes Overview
NOTES:
Flash Memory
Rewrite Mode
Function
Areas which
can be rewritten
Operating
mode
ROM programmer None
Flash memory rewrite mode
Erase block
Program method
Erase method
Program and erase control method
Protect method
Number of commands
Programming and erasure endurance
ROM code protection
1. The boot ROM area contains standard serial I/O mode and CAN I/O mode rewrite control program which is stored in
2. Can be programmed in byte units in only parallel I/O mode.
3. Definition of programming and erasure endurance
1. The PM13 bit remains set to 1 while the FMR01 bit in the FMR0 register = 1 (CPU rewrite mode enabled). The PM13 bit
2. When in CPU rewrite mode, bits PM10 and PM13 in the PM1 register are set to 1. The rewrite control program can only be
3. When using standard serial I/O mode 2, make sure a main clock input oscillation frequency is set to 5 MHz, 10 MHz, or 16
it when shipped from the factory. This area can only be rewritten in parallel I/O mode.
The programming and erasure endurance is defined to be per-block erasure endurance. For example, assume a case where
a 4K-byte block A is programmed in 2,048 operations by writing one word at a time and erased thereafter.
In this case, the block is reckoned as having been programmed and erased once.
If a product is 100 times of programming and erasure endurance, each block in it can be erased up to 100 times.
is reverted to its original value by setting the FMR01 bit to 0 (CPU rewrite mode disabled). However, if the PM13 bit is
changed during CPU rewrite mode, its changed value is not reflected until after the FMR01 bit is set to 0.
executed in the internal RAM or in an external area that is enabled for use when the PM13 bit = 1.
MHz.
Apr 14, 2006
The user ROM area is
rewritten when the CPU
e x e c u t e s s o f t w a r e
commands.
EW0 mode:
Rewrite in areas other
than flash memory
EW1 mode:
Can be rewritten in the
flash memory
User ROM area
Single-chip mode
Memory expansion mode
Boot mode (EW0 mode)
Item
CPU Rewrite Mode
User ROM area
Boot ROM area
page 251 of 376
(EW0 mode)
(2)
(3)
(1)
4 modes (CPU rewrite, standard serial I/O, parallel I/O, CAN I/O)
See Figure 21.1 Flash Memory Block Diagram
1 block (4 Kbytes)
In units of word, in units of byte
Collective erase, block erase
Program and erase controlled by software command
Lock bit protects each block
8 commands
100 times
Parallel I/O, standard serial I/O, and CAN I/O modes are supported.
Standard Serial I/O Mode
User ROM area
Boot mode
Serial programmer
The user ROM area is
r e w r i t t e n u s i n g a
d e d i c a t e d
programmer.
Standard serial I/O mode 1:
C l o c k s y n c h r o n o u s
serial I/O
Standard serial I/O mode 2:
UART
(3)
s e r i a l
(1)
User ROM area
Boot ROM area
Parallel I/O mode
Parallel programmer
The boot ROM and user
ROM areas are rewritten
using a dedicated parallel
programmer.
Parallel I/O Mode
Specifications
(2)
21. Flash Memory Version
The user ROM area is
rewritten busing a dedicated
CAN programmer.
User ROM area
Boot mode
CAN programmer
CAN I/O Mode