M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 378

IC M16C MCU FLASH 100QFP

M306N4FGTFP

Manufacturer Part Number
M306N4FGTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N4FGTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
23.8.1.4 Timer A (Pulse Width Modulation (PWM) Mode)
The timer remains idle after reset. Set the mode, count source, counter value, etc. using the TAiMR
(i = 0 to 4) register, the TAi register, bits TA0TGL and TA0TGH in the ONSF register, and the TRGSR
register before setting the TAiS bit in the TABSR register to 1 (count starts).
Always make sure the TAiMR register, bits TA0TGL and TA0TGH, and the TRGSR register are modified
while the TAiS bit remains 0 (count stops) regardless whether after reset or not.
The IR bit is set to 1 when setting a timer operating mode with any of the following procedures:
• Select the PWM mode after reset.
• Change an operating mode from timer mode to PWM mode.
• Change an operating mode from event counter mode to PWM mode.
To use the timer Ai interrupt (the IR bit), set the IR bit to 0 by program after the above listed changes
have been made.
When setting TAiS bit to 0 (count stops) during PWM pulse output, the following action occurs:
• Stop counting.
• When TAiOUT pin is output “H”, output level is set to “L” and the IR bit is set to 1.
• When TAiOUT pin is output “L”, both output level and the IR bit remain unchanged.
If a low-level signal is applied to the NMI pin when the IVPCR1 bit in the TB2SC register = 1 (three-phase
output forcible cutoff by input on NMI pin enabled), pins TA1OUT, TA2OUT, and TA4OUT go to a
high-impedance state.
Apr 14, 2006
page 354 of 376
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23. Usage Notes

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