M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 96

• Manufacturer Part Number: M306N4FGTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
8.5 Oscillation Stop and Re-oscillation Detection Function
Table 8.9 Specification Overview of Oscillation Stop and Re-oscillation Detection Function
The oscillation stop and re-oscillation detection function is such that main clock oscillation circuit stop and
re-oscillation are detected. At oscillation stop, re-oscillation detection, reset or oscillation stop, re-oscillation
detection interrupt request are generated. Which is to be generated can be selected using the CM27 bit in
the CM2 register.
The oscillation stop and re-oscillation detection function can be enabled and disabled using the CM20 bit in
the CM2 register.
Table 8.9 lists a Specification Overview of Oscillation Stop and Re-oscillation Detection Function.
Oscillation stop detectable clock and
frequency bandwidth
Enabling condition for oscillation stop
and re-oscillation detection function
Operation at oscillation stop,
re-oscillation detection
8.5.1 Operation when CM27 Bit = 0 (Oscillation Stop Detection Reset)
8.5.2 Operation when CM27 Bit = 1 (Oscillation Stop, Re-oscillation Detection Interrupt)
Where main clock stop is detected when the CM20 bit is 1 (oscillation stop, re-oscillation detection function
enabled), the MCU is initialized, coming to a halt (oscillation stop reset; refer to 4. Special Function
Registers (SFRs), 5. Resets).
This status is reset with hardware reset. Also, even when re-oscillation is detected, the MCU can be
initialized and stopped; it is, however, necessary to avoid such usage (During main clock stop, do not set
the CM20 bit to 1 and the CM27 bit to 0).
Where the main clock corresponds to the CPU clock source and the CM20 bit is 1 (oscillation stop, re-oscillation
detection function enabled), the system is placed in the following state if the main clock comes to a halt:
• Oscillation stop, re-oscillation detection interrupt request is generated.
• The on-chip oscillator starts oscillation, and the on-chip oscillator clock becomes the clock source for
• CM21 bit = 1 (on-chip oscillator clock is the clock source for CPU clock)
• CM22 bit = 1 (main clock stop detected)
• CM23 bit = 1 (main clock stopped)
Where the PLL clock corresponds to the CPU clock source and the CM20 bit is 1, the system is placed in
the following state if the main clock comes to a halt: Since the CM21 bit remains unchanged, set it to 1
(on-chip oscillator clock) inside the interrupt routine.
• Oscillation stop, re-oscillation detection interrupt request is generated.
• CM22 bit = 1 (main clock stop detected)
• CM23 bit = 1 (main clock stopped)
• CM21 bit remains unchanged
Where the CM20 bit is 1, the system is placed in the following state if the main clock re-oscillates from the
stop condition:
• Oscillation stop, re-oscillation detection interrupt request is generated.
• CM22 bit = 1 (main clock re-oscillation detected)
• CM23 bit = 0 (main clock oscillation)
• CM21 bit remains unchanged
CPU clock and peripheral functions in place of the main clock.
Apr 14, 2006
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f(XIN) ≥ 2 MHz
Set CM20 bit to 1 (enabled)
•Reset occurs (when CM27 bit = 0)
•Oscillation stop, re-oscillation detection interrupt is generated (when CM27 bit =1)
Specification
8. Clock Generation Circuit