M306N4FGTFP Renesas Electronics America, M306N4FGTFP Datasheet - Page 160

• Manufacturer Part Number: M306N4FGTFP
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/6Nr

Specifications of M306N4FGTFP

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ09B0009-0240
Figure 14.6 Registers ICTB2 and TB2SC
Timer B2 Interrupt Generation Frequency Set Counter
NOTES:
Timer B2 Special Mode Register
NOTES:
b7
b7
1. Use the MOV instruction to set the ICTB2 register.
2. If the INV01 bit is set to 1, set the ICTB2 register when the TB2S bit is set to 0 (timer B2 count stops), If
Apr 14, 2006
3. If the INV00 bit is set to 1, the first interrupt is generated when the timer B2 underflows n-1 times, n
1. Write to this register after setting the PRC1 bit in the PRCR register to 1 (write enabled).
2. If the INV11 bit in the INVC1 register is 0 (three-phase mode 0) or the INV06 bit in the INVC0 register
3. Related pins are U(P8_0/TA4OUT), U(P8_1/TA4IN), V(P7_2/CLK2/TA1OUT), V(P7_3/CTS2/RTS2/TA1IN),
b6
the INV01 bit is set to 0 and the TB2S bit to 1 (timer B2 count starts), do not set the ICTB2 register when
the timer B2 underflows.
being the value set in the ICTB2 counter. Subsequent interrupts are generated every n times the timer
B2 underflows.
is 1 (sawtooth wave modulation mode), set this bit to 0 (timer B2 underflow).
W(P7_4/TA2OUT), W(P7_5/TA2IN).
If a low-level signal is applied to the NMI pin when the IVPCR1 bit = 1, the target pins go to a high-impedance
state regardless of which functions of those pins are being used.
After forced interrupt (cutoff), input "H" to the NMI pin and set the IVPCR1 bit to 0: this forced cutoff will
be reset.
b5
b4
b3
b2
page 136 of 376
b1
b0
b0
PWCON
IVPCR1
When the INV01 bit in the INVC0 register is set to 0
(the ICTB2 counter increments whenever the timer B2
underflows) and the setting value is n , the timer B2 interrupt
is generated every n th time timer B2 underflow occurs.
When the INV01 bit is set to 1 (the INV00 bit selects
count timing of the ICTB2 counter) and setting value is
n , the timer B2 interrupt is generated every n th time
timer B2 underflow meeting the condition selected in
the INV00 bit occurs.
Nothing is assigned. If necessary, set to 0.
Symbol
(b7-b2)
Bit
-
Symbol
TB2SC
Symbol
ICTB2
Timer B2 reload timing
switching bit
Three-phase output port
NMI control bit 1
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
(1)
Bit Name
Address
Address
Function
039Eh
01CDh
(3)
14. Three-Phase Motor Control Timer Function
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
0 : Three-phase output forcible cutoff
1 : Three-phase output forcible cutoff
occurrences
by NMI input (high-impedance)
disabled
by NMI input (high-impedance)
enabled
(1) (2) (3)
Function
(2)
XXXXXX00b
After Reset
After Reset
Undefined
Setting Range
1 to 15
WO
RW
RW
RW
RW
-