D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 1051

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

26.3.18 Receive Data Timing Select Register (RDTIMSEL)
RDTIMSEL selects the acquisition timing of receive response or receive data from the card.
Consider the timing according to the multimedia card standards to set this register.
26.4
The multimedia card is an external storage media that can be easily connected or disconnected.
The MMCIF operates in MMC mode.
Insert a card and supply power to it. Then operate the MMCIF by applying the transfer clock after
setting an appropriate transfer clock frequency.
Do not connect or disconnect the card during command sequence execution or in the data busy
state.
26.4.1
MMC mode is an operating mode in which the transfer clock is output from the MCCLK pin,
command transmission/response receive occurs via the MCCMD pin, and data is
transmitted/received via the MCDAT pin. In this mode the next command can be issued while
data is being transmitted/received.
This feature is efficient for multiblock or stream transfer. In this case, the next command is the
CMD12 command, which aborts the current command sequence.
In MMC mode, broadcast commands that simultaneously issue commands to multiple cards are
supported. After information of the inserted cards is recognized by a broadcast command, a
Bit
7 to 1
0
Operation
Operations in MMC Mode
Bit
Name
⎯
RTSEL
Initial value:
Initial
Value
All 0
0
R/W:
Bit:
R/W
R
R/W
7
0
R
-
R
6
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Receive Data Timing Selection
0: Receives data at the falling of MCCLK
1: Receives data at the rising of MCCLK
R
5
0
-
4
-
0
R
R
3
0
-
Rev. 2.00 Feb. 12, 2010 Page 967 of 1330
2
0
R
-
R
1
0
-
RTSEL
R/W
0
0
REJ09B0554-0200