D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 834

MPU 3V 8K,PB-FREE, 256-BGA

D17760BP200ADV

Manufacturer Part Number
D17760BP200ADV
Description
MPU 3V 8K,PB-FREE, 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of D17760BP200ADV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D17760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Rev. 2.00 Feb. 12, 2010 Page 750 of 1330
REJ09B0554-0200
Bits
7
6
5
4
Bit Name
HCFS1
HCFS0
BLE
CLE
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Host Controller Functional State
HCD determines whether HC has started to route
SOF after having read the SF bit of
HcInterruptStatus. This bit can be changed by HC
only in the USB suspend state. HC can change from
the USB suspend state to the USB resume state
after having detected the resume signal from the
downstream port. In HC, USB suspend is entered
after the software reset like USB reset is entered
after the hardware reset. The former resets the root
hub.
00: USB reset state
01: USB resume state
10: USB operation state
11: USB suspend state
This bit is set to enable the processing of the bulk list
in the next frame. HC checks this bit when the
processing of the list has been determined. When
this bit is 0 (disabling), HCD can modify the list.
When HcBulkCurrentED indicates ED to be deleted,
HCD should increment the pointer by updating
HcBulkCurrentED before re-enabling the list
processing.
0: Bulk list processing is disabled in the next frame
1: Bulk list processing is enabled in the next frame
This bit is set to 1 to enable processing of the control
list in the next frame. When cleared to 0 by HCD, the
control list is not processed after the next SOF. HC
must check this bit whenever the list is to be
processed. When this bit is 0 (disabling), HCD can
modify the list. When HcControlCurrentED indicates
ED to be deleted, HCD should increment the pointer
by updating HcControlCurrentED before re-enabling
list processing.
0: Control list processing is disabled in the next
1: Control list processing is enabled in the next frame
Bulk List Enable
Control List Enable
frame

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