D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 307

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9.2
Table 9.1 shows the INTC pin configuration.
Table 9.1
Pin Name
Nonmaskable interrupt
input pin
IRL interrupt input pins
IRQ interrupt input pins
9.3
The INTC has the following registers. For details on the addresses of these registers and the state
of registers in each operating mode, see section 32, List of Registers.
Table 9.2
Register Name
Interrupt control register
Interrupt priority level setting register A
Interrupt priority level setting register B
Interrupt priority level setting register C
Interrupt priority level setting register D
Interrupt priority level setting register 00
Interrupt priority level setting register 04
Interrupt priority level setting register 08
Interrupt priority level setting register 0C INTPRI0C R/W
Interrupt source register 00
Interrupt source register 04
Interrupt mask register 00
Interrupt mask register 04
Interrupt mask clear register 00
Interrupt mask clear register 04
Input/Output Pins
Register Descriptions
Pin Configuration
Register Configuration (1)
Abbreviation
NMI
IRL3 to IRL0
IRQ7 to IRQ4
Abbrev.
ICR
IPRA
IPRB
IPRC
IPRD
INTPRI00
INTPRI04
INTPRI08
INTREQ00 R
INTREQ04 R
INTMSK00 R/W
INTMSK04 R/W
INTMSK
CLR00
INTMSK
CLR04
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
I/O
Input
Input
Input
P4 Address
H'FFD0 0000
H'FFD0 0004
H'FFD0 0008
H'FFD0 000C
H'FFD0 0010
H'FE08 0000
H'FE08 0004
H'FE08 0008
H'FE08 000C
H'FE08 0020
H'FE08 0024
H'FE08 0040
H'FE08 0044
H'FE08 0060
H'FE08 0064
Function
Input of nonmaskable interrupt request
signal
Input of IRL interrupt request signals
(maskable by the IMASK bits in SR)
Input of IRQ interrupt request signals
Rev. 2.00 Feb. 12, 2010 Page 223 of 1330
Area 7 Address Size
H'1FD0 0000
H'1FD0 0004
H'1FD0 0008
H'1FD0 000C
H'1FD0 0010
H'1E08 0000
H'1E08 0004
H'1E08 0008
H'1E08 000C
H'1E08 0020
H'1E08 0024
H'1E08 0040
H'1E08 0044
H'1E08 0060
H'1E08 0064
REJ09B0554-0200
16
16
16
16
16
32
32
32
32
32
32
32
32
32
32
Sync
Clock
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck
Pck