D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 81

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Table 20.2
Table 20.2
Table 20.3
Table 20.4
Section 21 USB Host Module (USB)
Table 21.1
Table 21.2
Table 21.2
Section 22 Controller Area Network 2 (HCAN2)
Table 22.1
Table 22.2
Table 22.3
Table 22.4
Table 22.4
Table 22.5
Section 23 Serial Protocol Interface (HSPI)
Table 23.1
Table 23.2
Table 23.2
Section 24 Pin Function Controller (PFC)
Table 24.1
Table 24.2
Table 24.2
Section 25 Audio Codec Interface (HAC)
Table 25.1
Table 25.2
Table 25.2
Table 25.3
Table 25.4
Section 26 Multimedia Card Interface (MMCIF)
Table 26.1
Table 26.2
Table 26.2
Table 26.3
Table 26.4
Table 26.5
Register Configuration (1)......................................................................................709
Register Configuration (2)......................................................................................709
Bus Formats of SSI Module ...................................................................................722
Number of Padding Bits for Each Valid Configuration .........................................726
Pin Configuration ...................................................................................................745
Register Configuration (1)......................................................................................746
Register Configuration (2)......................................................................................747
Pin Configuration ...................................................................................................788
Address map...........................................................................................................791
Settings of Mailbox Functions................................................................................796
Register Configuration (1)......................................................................................798
Register Configuration (2)......................................................................................802
TSEG1 and TSEG2 Settings ..................................................................................817
Pin Configuration ...................................................................................................850
Register Configuration (1)......................................................................................851
Register Configuration (2)......................................................................................851
Multiplexed Pins Controlled by Port Control Registers .........................................867
Register Configuration (1)......................................................................................870
Register Configuration (2)......................................................................................871
Pin Configuration ...................................................................................................910
Register Configuration (1)......................................................................................911
Register Configuration (2)......................................................................................912
AC97 Transmit Frame Structure ............................................................................926
AC97 Receive Frame Structure..............................................................................927
Pin Configuration ...................................................................................................936
Register Configuration (1)......................................................................................937
Register Configuration (2)......................................................................................938
Correspondence between Commands and Settings of CMDTYR and RSPTYR ...943
CMDR Configuration.............................................................................................946
Correspondence between Command Response Byte Number and RSPR ..............948
Rev. 2.00 Feb. 12, 2010 Page lxxix of lxxxii
REJ09B0554-0200