D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 1210

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

31.2.4
BAMRB is an 8-bit readable/writable register that specifies which bits are to be masked in the
break ASID set in BASRA and the break address set in BARB.
Note: x: Don't care
Rev. 2.00 Feb. 12, 2010 Page 1126 of 1330
REJ09B0554-0200
Bit
7 to 4
2
3
1
0
Break Address Mask Register B (BAMRB)
Bit Name
—
BASMB
BAMB2
BAMB1
BAMB0
Initial value:
Initial Value
All 0
—
—
—
—
R/W:
Bit:
7
R
0
-
R
6
0
-
R/W
R
R/W
R/W
R/W
R/W
R
5
0
-
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Break ASID Mask B
Specifies whether all bits of the channel B break
ASID (BASB7 to BASB0) set in BASRB are to be
masked.
0: All BASRB bits are included in break conditions
1: No BASRB bits are included in break conditions
Break Address Mask B2 to B0
These bits specify which bits of the channel B
break address (BAB31 to BAB0) set in BARB are
to be masked.
000: All BARB bits are included in break conditions
001: Lower 10 bits of BARB are masked, and
010: Lower 12 bits of BARB are masked, and
011: All BARB bits are masked, and not
100: Lower 16 bits of BARB are masked, and
101: Lower 20 bits of BARB are masked, and
11x: Setting prohibited
R
4
0
-
not included in break conditions
not included in break conditions
included in break conditions
not included in break conditions
not included in break conditions
BAMB2 BASMB BAMB1 BAMB0
R/W
3
-
R/W
2
-
R/W
1
-
R/W
0
-