UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 108

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 1. When boot swap is not used: Set the option bytes to 0080H to 0084H, and the on-chip debug security IDs
Remark The flash memory is divided into blocks (one block = 1 KB). For the address values and block numbers, see
Figure 3-11. Memory Map (
Data memory
space
Bank
area
Common
area
2. Writing boot cluster 0 can be prohibited depending on the setting of security (see 27.8 Security Settings).
3. The buffer RAM is incorporated only in the
Program RAM area
RAM space in
which instruction
can be fetched
Program
memory
space
Table 3-3 Correspondence Between Address Values and Block Numbers in Flash Memory.
When boot swap is used:
FA00H to FA1FH cannot be used with the
1 KB
Common
area
B F F F H
B C 0 0 H
B B F F H
8 4 F F H
8 3 F F H
7 F F F H
7 C 0 0 H
7 B F F H
0 7 F F H
0 3 F F H
8 0 0 0 H
0 4 0 0 H
0 0 0 0 H
Bank
area
F E D F H
F E F F H
F E E 0 H
F A F F H
D F F F H
B F F F H
F F F F H
F B 0 0 H
F A 1 F H
F 7 F F H
C 0 0 0 H
7 F F F H
F F 0 0 H
F A 2 0 H
F A 0 0 H
F 9 F F H
F 8 0 0 H
E 0 0 0 H
8 0 0 0 H
0 0 0 0 H
Block 2FH
Block 20H
Block 1FH
Block 01H
Block 00H
Special function registers
Internal high-speed RAM
Internal expansion RAM
(Memory bank 0)
General-purpose
(memory bank 0)
μ
32
32
registers
Flash memory
16384
Flash memory
32768
1024
6144
PD78F0527D, 78F0527DA, 78F0537D, 78F0537DA, 78F0547D, and 78F0547DA)
256
Buffer RAM
Reserved
Reserved
Reserved
8 bits
(SFR)
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
Note 3
to 0085H to 008EH.
Set the option bytes to 0080H to 0084H and 1080H to 1084H, and the on-chip
debug security IDs to 0085H to 008EH and 1085H to 108EH.
Block 3FH
Block 30H
(Memory bank 2)
(Memory bank 1)
(Memory bank 1)
(Memory bank 4)
(Memory bank 3)
μ
PD78F0527D, 78F0527DA, 78F0537D and 78F0537DA.
(Memory bank 5)
μ
PD78F0547D and 78F0547DA (78K0/KF2). The area from
7 F F F H
0 F F F H
1 0 8 F H
1 0 8 E H
1 0 7 F H
0 7 F F H
0 0 8 F H
0 0 8 E H
0 0 7 F H
0 0 3 F H
1 0 8 5 H
1 0 8 4 H
1 0 8 0 H
1 0 0 0 H
0 8 0 0 H
0 0 8 5 H
0 0 8 4 H
0 0 8 0 H
0 0 4 0 H
0 0 0 0 H
Block 4FH
Block 40H
(Memory bank 2)
On-chip debug security
On-chip debug security
Option byte area
Option byte area
ID setting area
ID setting area
CALLT table area
CHAPTER 3 CPU ARCHITECTURE
CALLF entry area
Vector table area
Program area
Program area
1905
Program area
2048
64
64
10
10
5
5
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
Note 1
Note 1
. . .
Note 1
Note 1
Block 7FH
1 F F F H
Block 70H
Boot cluster 0
Boot cluster 1
(Memory bank 5)
Note 2
108