UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 713

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
25.5 Cautions for Low-Voltage Detector
(V
(1) When used as reset
(2) When used as interrupt
(1) When used as reset
(2) When used as interrupt
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
LVI
In a system where the supply voltage (V
<Action>
), the operation is as follows depending on how the low-voltage detector is used.
The system may be repeatedly reset and released from the reset status.
In this case, the time from release of reset to the start of the operation of the microcontroller can be arbitrarily set by
taking action (1) below.
Interrupt requests may be frequently generated. Take (b) of action (2) below.
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a software
counter that uses a timer, and then initialize the ports (see Figure 25-9).
(a) Confirm that “supply voltage (V
(b) In a system where the supply voltage fluctuation period is long in the vicinity of the LVI detection voltage, wait for
Remark If bit 2 (LVISEL) of the low voltage detection register (LVIM) is set to “1”, the meanings of the above words
voltage (V
interrupt by using bit 0 (LVIF) of the low-voltage detection register (LVIM). Clear bit 0 (LVIIF) of interrupt request
flag register 0L (IF0L) to 0.
the supply voltage fluctuation period, confirm that “supply voltage (V
the falling edge of V
using the LVIF flag, and clear the LVIIF flag to 0.
change as follows.
• Supply voltage (V
• Detection voltage (V
DD
) < detection voltage (V
DD
, or “supply voltage (V
DD
)
LVI
) → Detection voltage (V
DD
→ Input voltage from external input pin (EXLVI)
) ≥ detection voltage (V
DD
LVI
) fluctuates for a certain period in the vicinity of the LVI detection voltage
)” when detecting the rising edge of V
DD
) < detection voltage (V
EXLVI
LVI
= 1.21 V)
)” when detecting the falling edge of V
CHAPTER 25 LOW-VOLTAGE DETECTOR
DD
) ≥ detection voltage (V
LVI
)” when detecting the rising edge of V
DD
, in the servicing routine of the LVI
LVI
)” when detecting
DD
, or “supply
713
DD
,