UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 625

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
19.3 Register Controlling Multiplier/Divider
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The multiplier/divider is controlled by multiplier/divider control register 0 (DMUC0).
Address: FF68H
(1) Multiplier/divider control register 0 (DMUC0)
Note When DMUE is set to 1, the operation is started. DMUE is automatically cleared to 0 after the operation is
Cautions 1. If DMUE is cleared to 0 during operation processing (when DMUE is 1), the operation result is
DMUC0
Symbol
DMUC0 is an 8-bit register that controls the operation of the multiplier/divider.
DMUC0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears DMUC0 to 00H.
complete.
2. Do not change the value of DMUSEL0 during operation processing (while DMUE is 1). If it is
3. If DMUE is cleared to 0 during operation processing (while DMUE is 1), the operation processing
DMUSEL0
DMUE
not guaranteed. If the operation is completed while the clearing instruction is being executed,
the operation result is guaranteed, provided that the interrupt flag is set.
changed, undefined operation results are stored in multiplication/division data register A0
(MDA0) and remainder data register 0 (SDR0).
is stopped. To execute the operation again, set multiplication/division data register A0 (MDA0),
multiplication/division data register B0 (MDB0), and multiplier/divider control register 0 (DMUC0),
and start the operation (by setting DMUE to 1).
DMUE
After reset: 00H
<7>
0
1
0
1
Figure 19-5. Format of Multiplier/Divider Control Register 0 (DMUC0)
Note
Stops operation
Starts operation
Division mode
Multiplication mode
6
0
R/W
5
0
Operation mode (multiplication/division) selection
4
0
Operation start/stop
3
0
CHAPTER 19 MULTIPLIER/DIVIDER
2
0
1
0
DMUSEL0
0
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