UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 292

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
7.4.2 Square-wave output operation
TO0n pin by setting the 16-bit timer output control register 0n (TOC0n) to 03H.
the counting operation is started in synchronization with the count clock.
is generated, and TO0n output is inverted. This TO0n output that is inverted at fixed intervals enables TO0n to output a
square wave.
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
When 16-bit timer/event counter 0n operates as an interval timer (see 7.4.1), a square wave can be output from the
When TMC0n3 and TMC0n2 are set to 11 (count clear & start mode entered upon a match between TM0n and CR00n),
When the value of TM0n later matches the value of CR00n, TM0n is cleared to 0000H, an interrupt signal (INTTM00n)
Remarks 1. For the setting of I/O pins, see 7.3 (5) Port mode register 0 (PM0).
Remark n = 0:
Compare match interrupt
Count clock
2. For how to enable the INTTM00n signal interrupt, see CHAPTER 20 INTERRUPT FUNCTIONS.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
(TMC0n3, TMC0n2)
Compare register
TMC0n3, TMC0n2
Operable bits
TM0n register
Operable bits
TO0n output
(INTTM00n)
78K0/KD2 products
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
Figure 7-21. Basic Timing Example of Square-Wave Output Operation
(CR00n)
0000H
Figure 7-20. Block Diagram of Square-Wave Output Operation
00
Interval
(N + 1)
16-bit counter (TM0n)
CR00n register
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Clear
N
Match signal
Interval
(N + 1)
N
11
N
Interval
(N + 1)
controller
Output
INTTM00n signal
N
TO0n output
Interval
(N + 1)
N
TO0n pin
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