UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 398

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UPD78F0513AMC-GAA-AX

Manufacturer Part Number
UPD78F0513AMC-GAA-AX
Description
MCU 8BIT 38PIN SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AMC-GAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0513AMC-GAA-AX
Manufacturer:
RENESAS
Quantity:
8 000
Part Number:
UPD78F0513AMC-GAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
78K0/Kx2
11.3 Register Controlling Watchdog Timer
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The watchdog timer is controlled by the watchdog timer enable register (WDTE).
(1) Watchdog timer enable register (WDTE)
Writing ACH to WDTE clears the watchdog timer counter and starts counting again.
This register can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 9AH or 1AH
Note The WDTE reset value differs depending on the WDTON setting value of the option byte (0080H). To
Cautions 1. If a value other than ACH is written to WDTE, an internal reset signal is generated. If the
Address: FF99H
Symbol
WDTE
operate watchdog timer, set WDTON to 1.
2. If a 1-bit memory manipulation instruction is executed for WDTE, an internal reset signal is
3. The value read from WDTE is 9AH/1AH (this differs from the written value (ACH)).
source clock to the watchdog timer is stopped, however, an internal reset signal is generated
when the source clock to the watchdog timer resumes operation.
generated. If the source clock to the watchdog timer is stopped, however, an internal reset
signal is generated when the source clock to the watchdog timer resumes operation.
0 (watchdog timer count operation disabled)
1 (watchdog timer count operation enabled)
7
Figure 11-2. Format of Watchdog Timer Enable Register (WDTE)
After reset: 9AH/1AH
WDTON Setting Value
6
Note
5
R/W
4
Note
.
1AH
9AH
3
WDTE Reset Value
CHAPTER 11 WATCHDOG TIMER
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