R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 1155

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

22.3.11 Transmit Data Assign Register (SITDAR)
SITDAR is a 16-bit readable/writable register that specifies the position of the transmit data in a
frame.
Initial value:
Bit
2 to 0
Bit
15
14 to 12 ⎯
R/W:
BIt:
Bit Name
BRDV[2:0]
Bit Name
TDLE
TDLE
R/W
15
0
14
—
R
0
13
—
R
0
Initial
Value
000
Initial
Value
0
All 0
12
—
R
0
R/W
R/W
R/W
R/W
R/W
R
11
0
R/W
TDLA[3:0]
10
0
Description
Baud Rate Generator's Division Ratio Setting
These bits set the frequency division ratio for the output
stage of the baud rate generator.
000: Prescaler output × 1/2
001: Prescaler output × 1/4
010: Prescaler output × 1/8
011: Prescaler output × 1/16
100: Prescaler output × 1/32
101: Setting prohibited
110: Setting prohibited
111: Prescaler output × 1/1*
Note: This setting is valid only when the bits BRPS4 to
Description
Transmit Left-Channel Data Enable
0: Disables left-channel data transmission
1: Enables left-channel data transmission
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W
9
0
BRPS0 are set to B'00001.
R/W
8
0
TDRE
R/W
7
0
Rev.1.00 Jan. 10, 2008 Page 1123 of 1658
TLREP
R/W
6
0
—
R
5
0
22. Serial I/O with FIFO (SIOF)
—
R
4
0
R/W
3
0
REJ09B0261-0100
R/W
TDRA[3:0]
2
0
R/W
1
0
R/W
0
0