R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 979

IC SUPERH MPU ROMLESS 436BGA

R8A77850BDBGV#RD0Z

Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850BDBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850BDBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.4.10 Display Contention
Color Palette Contention: When performing α blending and EOR operations, if the same color
palette is selected for both planes with the input display data format at 8 bits/pixel, color palette
contention may occur. This is because contention decisions occur not in plane units, but in pixel
units.
Figure 19.6 shows contention for a case in which data for plane 1, plane 2, and plane 3 is 8
bits/pixel, α blending is specified for plane 1 and EOR operation is specified for plane 2, and the
same color palette is selected for the three planes. (It is assumed that there are no transparent-color
pixels in plane 1, plane 2, or plane 3.)
When contention occurs, α blending and EOR operations become invalid, and the plane with the
highest priority is displayed.
Figure 19.7 summarizes the display results when combining color palette selection and transparent
colors in the display section A in Figure 19.6.
• P1αP2 shows the result of α blending of plane 1 and plane 2.
• P2⊕P3 shows the result of an EOR operation on plane 2 and plane 3.
• P1α (P2⊕P3) shows the result of α blending of plane 1 with the result of an EOR operation on
• BPOR shows display data in the background color register.
Legend:
P1: Plane 1
P2: Plane 2
P3: Plane 3
Note: Bold black lines indicate the display area.
Plane 1 (α blending)
Plane 2 (EOR operation)
Plane 3
plane 2 and Plane 3.
(When Same Color Palette Is Selected for Multiple Planes)
No contention
P1 is displayed
Figure 19.6 Color Palette Contention
P1 and P2
contention
P1 is displayed
P1, P2, and P3
contention
P1 is displayed
A
Rev.1.00 Jan. 10, 2008 Page 947 of 1658
P2 and P3
contention
P2 is displayed
19. Display Unit (DU)
REJ09B0261-0100
No contention
P3 is displayed

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