R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 275

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

This LSI includes three types of memory modules for storage of instructions and data: OL
memory, IL memory, and U memory. The OL memory is suitable for data storage while the IL
memory is suitable for instruction storage. The U memory can store instructions and/or data.
9.1
(1)
• Capacity
• Page
• Memory map
Table 9.1
• Ports
• Priority
Page 0A
Page 0B
Page 1A
Page 1B
The OL memory in this LSI is 16 Kbytes.
The OL memory is divided into four pages (pages 0A, 0B, 1A and 1B).
The OL memory is allocated in the addresses shown in table 9.1 in both the virtual address
space and the physical address space.
Each page has three independent read/write ports and is connected to the SuperHyway bus, the
cache/RAM internal bus, and operand bus. The operand bus is used when the OL memory is
accessed through operand access. The cache/RAM internal bus is used when the OL memory
is accessed through instruction fetch. The SuperHyway bus is used for OL memory access
from the SuperHyway bus master module.
In the event of simultaneous accesses to the same page from different buses, the access
requests are processed according to priority. The priority order is: SuperHyway bus >
Cache/RAM internal bus > operand bus.
OL Memory
Features
OL memory Addresses
H'E500 E000 to H'E500 EFFF
H'E500 F000 to H'E500 FFFF
H'E501 0000 to H'E501 0FFF
H'E501 1000 to H'E501 1FFF
Section 9 On-Chip Memory
Rev.1.00 Jan. 10, 2008 Page 243 of 1658
9. On-Chip Memory
REJ09B0261-0100