R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 765

IC SUPERH MPU ROMLESS 436BGA

R8A77850BDBGV#RD0Z

Manufacturer Part Number
R8A77850BDBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850BDBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850BDBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The CPG generates clocks provided to the internal and external bus interfaces of the SH7785, and
controls power-down mode. The CPG consists of a crystal oscillator circuit, PLLs, dividers, and
the control unit.
15.1
The CPG has the following features.
• Generates SH7785 internal clocks*
• Generates SH7785 external clocks
• Clock operating modes
• Controls power-down mode
Figure 15.1 shows a block diagram of the CPG.
Note: * For description of the clock used by each module, see the sections on individual
Generates the CPU clock (Ick) used in the CPU, FPU, cache, and TLB; the SuperHyway clock
(SHck) used in the SuperHyway, the GDTA clock (GAck) used in the graphic data translation
accelerator, the DU clock (DUck) used in the display unit; the peripheral clock (Pck) used in
the interface with on-chip peripheral modules; and the RAM clock (Uck) used in URAM
Generates the bus clock (Bck) used in the interface with the external devices, and the DDR
clock (DDRck) for the memory clock used in the DBSC2.
Selects a crystal resonator or an external clock input for the clock input to the CPG
Can stop the CPU in sleep mode and specific modules in module standby mode. For details,
see section 17, Power-Down Mode.
Features
modules.
Section 15 Clock Pulse Generator (CPG)
Rev.1.00 Jan. 10, 2008 Page 733 of 1658
15. Clock Pulse Generator (CPG)
REJ09B0261-0100

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