R8A77850BDBGV#RD0Z Renesas Electronics America, R8A77850BDBGV#RD0Z Datasheet - Page 1163

• Manufacturer Part Number: R8A77850BDBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850BDBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

22.4.3
The SIOF performs the following transfer.
• Transmit/receive data: Transfer of 8-bit data/16-bit data/16-bit stereo data
• Control data: Transfer of 16-bit data (uses the transmit/receive control register as interface)
(1)
As shown in table 22.6, the SIOF supports the following four transfer modes. The transfer mode
can be specified by the TRMD1 and TRMD0 bits in SIMDR.
Table 22.6 Serial Transfer Modes
Note:
TRMD1 and
TRMD0
00
01
10
11
SIOF_SCK
SIOF_RXD
SIOF_SYNC
SIOF_TXD
(a) Falling-edge sampling (REDG = 0)
Transfer Mode
*
Transfer Data Format
The control data method is valid when the FL bits are set to B'1xxx (x: don't care).
Transfer Mode
Slave mode 1
Slave mode 2
Master mode 1
Master mode 2
Figure 22.4 SIOF Transmit/Receive Timing
Receive timing
Transmit timing
SIOF_SYNC
Synchronous pulse
Synchronous pulse
Synchronous pulse
L/R
SIOF_SCK
SIOF_RXD
SIOF_SYNC
SIOF_TXD
(b) Rising-edge sampling (REDG = 1)
Rev.1.00 Jan. 10, 2008 Page 1131 of 1658
Bit Delay
SYNCDL bit
No
22. Serial I/O with FIFO (SIOF)
Slot position
Secondary FS
Slot position
Not supported
Control Data*
REJ09B0261-0100
Receive timing
Transmit timing