MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 137
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MC68908GZ8MFAE
Manufacturer Part Number
MC68908GZ8MFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68908GZ8CFJER.pdf
(314 pages)
Specifications of MC68908GZ8MFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 137 of 314
- Download datasheet (5Mb)
12.12 Programmer’s Model of Message Storage
This section details the organization of the receive and transmit message buffers and the associated
control registers. For reasons of programmer interface simplification, the receive and transmit message
buffers have the same outline. Each message buffer allocates 16 bytes in the memory map containing a
13-byte data structure. An additional transmit buffer priority register (TBPR) is defined for the transmit
buffers.
12.12.1 Message Buffer Outline
Figure 12-12
identifiers. The mapping of standard identifiers into the IDR registers is shown in
the 13-byte data structure are undefined out of reset.
Freescale Semiconductor
shows the common 13-byte data structure of receive and transmit buffers for extended
The foreground receive buffer can be read anytime but cannot be written.
The transmit buffers can be read or written anytime.
Addr
$05bA
$05bB
$05bC
$05bD
$05bE
$05b0
$05b1
$05b2
$05b3
$05b4
$05b5
$05b6
$05b7
$05b8
$05b9
$05bF
1. Where b equals the following:
2. Not applicable for receive buffers
b=4 for receive buffer
b=5 for transmit buffer 0
b=6 for transmit buffer 1
b=7 for transmit buffer 2
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Figure 12-11. Message Buffer Organization
(1)
TRANSMIT BUFFER PRIORITY REGISTER
DATA SEGMENT REGISTER 0
DATA SEGMENT REGISTER 1
DATA SEGMENT REGISTER 2
DATA SEGMENT REGISTER 3
DATA SEGMENT REGISTER 4
DATA SEGMENT REGISTER 5
DATA SEGMENT REGISTER 6
DATA SEGMENT REGISTER 7
DATA LENGTH REGISTER
IDENTIFIER REGISTER 0
IDENTIFIER REGISTER 1
IDENTIFIER REGISTER 2
IDENTIFIER REGISTER 3
NOTE
Register Name
UNUSED
UNUSED
Programmer’s Model of Message Storage
(2)
Figure
12-13. All bits of
137
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