MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 276

IC MCU 8BIT 8K FLASH 48-LQFP

MC68908GZ8MFAE

Manufacturer Part Number
MC68908GZ8MFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68908GZ8MFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Development Support
computer. Monitor mode entry can be achieved without use of the higher test voltage, V
vector addresses $FFFE and $FFFF are blank, thus reducing the hardware requirements for in-circuit
programming.
Features of the monitor ROM include:
20.3.1 Functional Description
Figure 20-8
The monitor ROM receives and executes commands from a host computer.
Figure 20-9
a host computer via a standard RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
Table 20-1
may be entered after a power-on reset (POR) and will allow communication at 7200 baud provided one
of the following sets of conditions is met:
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
276
unauthorized users.
Normal user-mode pin functionality
One pin dedicated to serial communication between monitor read-only memory (ROM) and host
computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Standard communication baud rate (7200 @ 8-MHz crystal frequency)
Execution of code in random-access memory (RAM) or FLASH
FLASH memory security feature
FLASH memory programming interface
350 bytes monitor ROM code size ($FE20 to $FF7D)
Monitor mode entry without high voltage, V
$FF)
Normal monitor mode entry if high voltage is applied to IRQ
If $FFFE and $FFFF does not contain $FF (programmed state):
If $FFFE and $FFFF do not contain $FF (programmed state):
If $FFFE and $FFFF contain $FF (erased state):
The external clock is 4 MHz (7200 baud)
PTB4 = low
IRQ = V
The external clock is 8 MHz (7200 baud)
PTB4 = high
IRQ = V
The external clock is 8 MHz (7200 baud)
IRQ = V
shows the pin conditions for entering monitor mode. As specified in the table, monitor mode
and
shows a simplified diagram of the monitor mode.
Figure 20-10
TST
TST
DD
(this can be implemented through the internal IRQ pullup) or V
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
show example circuits used to enter monitor mode and communicate with
(1)
TST
, if reset vector is blank ($FFFE and $FFFF contain
Freescale Semiconductor
SS
TST
, as long as

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