MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 158

IC MCU 8BIT 8K FLASH 48-LQFP

MC68908GZ8MFAE

Manufacturer Part Number
MC68908GZ8MFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68908GZ8MFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Input/Output (I/O) Ports
13.3 Port A
Port A is an 8-bit special-function port that shares all eight of its pins with the keyboard interrupt (KBI)
module. Port A also has software configurable pullup devices if configured as an input port.
13.3.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the eight port A pins.
PTA7–PTA0 — Port A Data Bits
KBD7–KBD0 — Keyboard Inputs
13.3.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a
logic 1 to a DDRA bit enables the output buffer for the corresponding port A pin; a logic 0 disables the
output buffer.
DDRA7–DDRA0 — Data Direction Register A Bits
158
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
The keyboard interrupt enable bits, KBIE7–KBIE0, in the keyboard interrupt control register (KBICR)
enable the port A pins as external interrupt pins. See
These read/write bits control port A data direction. Reset clears DDRA7–DDRA0, configuring all port
A pins as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
Alternative
Function:
Address:
Address:
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Reset:
Reset:
Read:
Read:
Write:
Write:
DDRA7
$0000
$0004
KBD7
PTA7
Bit 7
Bit 7
0
Figure 13-3. Data Direction Register A (DDRA)
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Figure 13-2. Port A Data Register (PTA)
DDRA6
PTA6
KBD6
6
6
0
DDRA5
PTA5
KBD5
5
5
0
NOTE
DDRA4
Unaffected by reset
PTA4
KBD4
4
4
0
Chapter 9 Keyboard Interrupt Module (KBI).
DDRA3
KBD3
PTA3
3
3
0
DDRA2
KBD2
PTA2
2
2
0
DDRA1
KBD1
PTA1
1
1
0
Freescale Semiconductor
DDRA0
KBD0
PTA0
Bit 0
Bit 0
0

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