MC68908GZ8MFAE Freescale Semiconductor, MC68908GZ8MFAE Datasheet - Page 255
![IC MCU 8BIT 8K FLASH 48-LQFP](/photos/37/62/376278/tqfp-48_sml.jpg)
MC68908GZ8MFAE
Manufacturer Part Number
MC68908GZ8MFAE
Description
IC MCU 8BIT 8K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68908GZ8CFJER.pdf
(314 pages)
Specifications of MC68908GZ8MFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
M689xx
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908GZ60E, M68EML08GZE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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Chapter 19
Timer Interface Module (TIM)
19.1 Introduction
This section describes the timer interface (TIM) module. The TIM is a two-channel timer that provides a
timing reference with input capture, output compare, and pulse-width-modulation functions.
is a block diagram of the TIM.
This particular MCU has two timer interface modules which are denoted as TIM1 and TIM2.
Freescale Semiconductor
BUS CLOCK
INTERNAL
TSTOP
TRST
16-BIT COMPARATOR
16-BIT COMPARATOR
16-BIT COMPARATOR
16-BIT COUNTER
TMODH:TMODL
TCH0H:TCH0L
TCH1H:TCH1L
16-BIT LATCH
16-BIT LATCH
CHANNEL 0
CHANNEL 1
PRESCALER
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Figure 19-1. TIM Block Diagram
ELS0B
ELS1B
MS0A
MS1A
PS2
ELS0A
ELS1A
PRESCALER SELECT
PS1
MS0B
CH0F
CH1F
PS0
CH0MAX
CH1MAX
CH0IE
CH1IE
TOV0
TOV1
TOIE
TOF
INTERRUPT
INTERRUPT
INTERRUPT
LOGIC
LOGIC
LOGIC
LOGIC
LOGIC
PORT
PORT
Figure 19-1
T[1,2]CH0
T[1,2]CH1
255
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