LFXP2-8E-5FTN256I Lattice, LFXP2-8E-5FTN256I Datasheet - Page 258

• Manufacturer Part Number: LFXP2-8E-5FTN256I
• Description: FPGA - Field Programmable Gate Array 8K LUTs 201 I/O Inst on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-8E-5FTN256I

• Number Of Macrocells: 8000
• Number Of Programmable I/os: 201
• Data Ram Size: 226304
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FTBGA-256
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 226304
• Number Of I /o: 201
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Package: 256FTBGA
• Family Name: LatticeXP2
• Device Logic Units: 8000
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 201
• Ram Bits: 226304
• Re-programmability Support: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Ambient and Junction Temperatures and Airflow
A common method of characterizing a packaged device’s thermal performance is with thermal resistance, or . For
a semiconductor device, thermal resistance indicates the steady state temperature rise of the die junction above a
given reference for each watt of power (heat) dissipated at the die surface. Its units are °C/W.
The most common examples are 
tance Junction-to-Case (also in °C/W). Another factor is 
Knowing the reference (i.e. ambient, case, or board) temperature, the power, and the relevant  value, the junction
temp can be calculated by the following equations.
While T
P is the total power dissipation of the device.

a high conductivity case mounted directly to a PCB or heatsink. And 
the package is known.
The Power Calculator utilizes the Ambient Temperature (°C) to calculate the Junction Temperature (°C) based on
the 
more accurate value of the Junction temperature.
Managing Power Consumption
One of the most critical design factors today is the reduction of system power consumption, especially for modern
handheld devices and electronics. There are several design techniques that can significantly reduce overall system
power consumption. Some of these include:
JA
is commonly used with natural and forced convection air-cooled systems. 
1. Reducing operating voltage.
2. Operating within the specified package temperature limitations.
3. Using the optimum clock frequency to reduce power consumption, since dynamic power is directly propor-
4. Reducing the span of the design across
5. Reducing the voltage swing of the I/Os where possible.
6. Using optimum encoding where possible. For example, a 16-bit binary counter has, on average, only 12%
7. Minimize the operating temperature, by the following methods:
JA
J
tional to the frequency of operation. Designers must determine if a portion of their design can be clocked at
a lower rate that will reduce power.
Activity Factor and a 7-bit binary counter has an average of 28% Activity Factor. On the other hand, a 7-bit
Linear Feedback Shift Register could toggle as much as 50% Activity Factor, which causes higher power
consumption. A gray code counter, where only one bit changes at each clock edge, will use the least
amount of power, as the Activity Factor would be less than 10%.
for the targeted device, per Equation 1 above. Users can also provide the Airflow values (in LFM) to get a
, T
A
,T
a. Use packages that can better dissipate heat. For example, packages with lower thermal impedance.
b. Place heat sinks and thermal planes around the device on the PCB.
c. Better airflow techniques using mechanical airflow guides and fans (both system fans and device
C
mounted fans).
and T
B
are the Junction, Ambient, Case (or Package) and Board temperatures (in °C) respectively,
JA
, Thermal Resistance Junction-to-Ambient (in °C/W) and 
T
T
T
J
J
J
= T
= T
= T
12-14
A
C
B
+ 
+ 
+ 
JB
, Thermal Resistance Junction-to-Board (in °C/W).
JA
JC
JB
* P
* P
* P
Power Estimation and Management
JB
applies when the board temp adjacent to
JC
is useful when the package has
for LatticeXP2 Devices
JC
, Thermal Resis-
(1)
(2)
(3)