YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 1082

• Manufacturer Part Number: YLCDRSK2378
• Description: KIT DEV EVAL H8S/2378 LCD
• Manufacturer: Renesas Electronics America
• Series: H8®r

Specifications of YLCDRSK2378

• Main Purpose: Displays, LCD Controller
• Embedded: Yes, MCU, 16-Bit
• Utilized Ic / Part: YLCDRSK2378
• Primary Attributes: 5.7" QVGA, Touch Screen
• Secondary Attributes: Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 25 List of Registers
Register
Abbreviation Reset
SMR_0
BRR_0
SCR_0
TDR_0
SSR_0
RDR_0
SCMR_0
SMR_1
BRR_1
SCR_1
TDR_1
SSR_1
RDR_1
SCMR_1
SMR_2
BRR_2
SCR_2
TDR_2
SSR_2
RDR_2
SCMR_2
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
ADCSR
ADCR
Rev.7.00 Mar. 18, 2009 page 1014 of 1136
REJ09B0109-0700
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
Initialized ⎯
High-
Speed
Clock
Division Sleep
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
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⎯
⎯
⎯
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⎯
⎯
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⎯
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⎯
⎯
⎯
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⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Module
Stop
⎯
⎯
⎯
Initialized Initialized
Initialized Initialized
Initialized Initialized
⎯
⎯
⎯
⎯
Initialized Initialized
Initialized Initialized
Initialized Initialized
⎯
⎯
⎯
⎯
Initialized Initialized
Initialized Initialized
Initialized Initialized
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
All Module
Clock Stop
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
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⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Software
Standby
⎯
⎯
⎯
Initialized Initialized
Initialized Initialized
Initialized Initialized
⎯
⎯
⎯
⎯
Initialized Initialized
Initialized Initialized
Initialized Initialized
⎯
⎯
⎯
⎯
Initialized Initialized
Initialized Initialized
Initialized Initialized
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Hardware
Standby
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Initialized
Module
SCI_0
SCI_1
SCI_2
A/D