YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 839
![KIT DEV EVAL H8S/2378 LCD](/photos/18/31/183139/mfg_ylcdrsk23781_sml.jpg)
YLCDRSK2378
Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of YLCDRSK2378
Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 839 of 1208
- Download datasheet (8Mb)
An I
item:
1. For the masked ROM version, W is added to the model name of the product that uses optional
This LSI has a two-channel I
The I
(inter-IC bus) interface (Rev. 03) standard and fast mode functions. The register configuration that
controls the I
Figure 16.1 shows a block diagram of the I
Figure 16.2 shows an example of I/O pin connections to external circuits.
16.1
• Continuous transmission/reception
• Start and stop conditions generated automatically in master mode
• Selection of acknowledge output levels when receiving
• Automatic loading of acknowledge bit when transmitting
• Bit synchronization/wait function
• Six interrupt sources
• Direct bus drive
IFIIC40A_010020020400
functions.
For example: HD6432375WFQ
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically
If transmission/reception is not yet possible, set the SCL to low until preparations are
completed.
Transmit-data-empty (including slave-address match), transmit-end, receive-data-full
(including slave-address match), arbitration lost, NACK detection, and stop condition
detection
Two pins, SCL and SDA pins function as NMOS open-drain outputs.
2
C bus interface is an option. When using the optional functions, take notice of the following
2
C bus interface conforms to and provides a subset of the NXP Semiconductors I
Features
Section 16 I
2
C bus differs partly from the NXP Semiconductors configuration, however.
2
C bus interface.
2
C Bus Interface 2 (IIC2) (Option)
2
C bus interface 2.
Section 16 I
Rev.7.00 Mar. 18, 2009 page 771 of 1136
2
C Bus Interface 2 (IIC2) (Option)
REJ09B0109-0700
2
C bus
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