YLCDRSK2378 Renesas Electronics America, YLCDRSK2378 Datasheet - Page 662
![KIT DEV EVAL H8S/2378 LCD](/photos/18/31/183139/mfg_ylcdrsk23781_sml.jpg)
YLCDRSK2378
Manufacturer Part Number
YLCDRSK2378
Description
KIT DEV EVAL H8S/2378 LCD
Manufacturer
Renesas Electronics America
Series
H8®r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of YLCDRSK2378
Main Purpose
Displays, LCD Controller
Embedded
Yes, MCU, 16-Bit
Utilized Ic / Part
YLCDRSK2378
Primary Attributes
5.7" QVGA, Touch Screen
Secondary Attributes
Source Code on CD, Debugging Requires Emulator Cable E10A USB/JTAG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 662 of 1208
- Download datasheet (8Mb)
Section 11 16-Bit Timer Pulse Unit (TPU)
Examples of Buffer Operation:
1. When TGR is an output compare register
Rev.7.00 Mar. 18, 2009 page 594 of 1136
REJ09B0109-0700
Figure 11.15 shows an operation example in which PWM mode 1 has been designated for
channel 0, and buffer operation has been designated for TGRA and TGRC. The settings used
in this example are TCNT clearing by compare match B, 1 output at compare match A, and 0
output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the
value in buffer register TGRC is simultaneously transferred to timer general register TGRA.
This operation is repeated each time compare match A occurs.
For details on PWM modes, see section 11.4.5, PWM Modes.
TGRB_0
TGRA_0
H'0000
TGRC_0
TGRA_0
TIOCA
TCNT value
Transfer
H'0200
H'0200
Figure 11.15 Example of Buffer Operation (1)
H'0200
H'0450
H'0450
H'0450
H'0520
H'0520
Time
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