XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 119

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Technical Data — MC68HC912D60A
9.1 Contents
9.2 Introduction
9.2.1 Exception Priority
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
CPU12 exceptions include resets and interrupts. Each exception has an
associated 16-bit vector, which points to the memory location where the
routine that handles the exception is located. Vectors are stored in the
upper 128 bytes of the standard 64K byte address map.
The six highest vector addresses are used for resets and non-maskable
interrupt sources. The remainder of the vectors are used for maskable
interrupts, and all must be initialized to point to the address of the
appropriate service routine.
A hardware priority hierarchy determines which reset or interrupt is
serviced first when simultaneous requests are made. Six sources are not
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Maskable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Latching of Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Interrupt Control and Priority Registers . . . . . . . . . . . . . . . . . 123
Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Register Stacking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
Customer Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Resets and Interrupts
Section 9. Resets and Interrupts
Technical Data
119