XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 286

• Manufacturer Part Number: XC68HC12A0CPV8
• Description: IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
• Manufacturer: Freescale Semiconductor

Specifications of XC68HC12A0CPV8

• Controller Family/series: 68HC12
• No. Of I/o's: 68
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Core Size: 16 Bit
• Program Memory Size: 60KB
• Peripherals: ADC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Multiple Serial Interface
Technical Data
286
NOTE:
DDS2, DDS0 — Data Direction for Port S Bit 2 and Bit 0
DDS3, DDS1 — Data Direction for Port S Bit 3 and Bit 1
DDS[6:4] — Data Direction for Port S Bits 6 through 4
DDS7 — Data Direction for Port S Bit 7
If mode fault error occurs, bits 5, 6 and 7 are forced to zero.
If the SCI receiver is configured for two-wire SCI operation,
corresponding port S pins will be input regardless of the state of these
bits.
If the SCI transmitter is configured for two-wire SCI operation,
corresponding port S pins will be output regardless of the state of
these bits.
If the SPI is enabled and expects the corresponding port S pin to be
an input, it will be an input regardless of the state of the DDRS bit. If
the SPI is enabled and expects the bit to be an output, it will be an
output ONLY if the DDRS bit is set.
In SPI slave mode, DDRS7 has no meaning or effect; the PS7 pin is
dedicated as the SS input. In SPI master mode, DDRS7 determines
whether PS7 is an error detect input to the SPI or a general-purpose
or slave select output line.
Multiple Serial Interface
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor