XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 298

IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112

XC68HC12A0CPV8

Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC68HC12A0CPV8

Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Interconnect Bus
SC0CR2 — MI Bus Control Register 2
Technical Data
298
RESET:
Bit 7
0
6
0
PT — MI Bus TxD0 polarity
Read or write anytime.
RIE — Receiver Interrupt Enable
TE — Transmitter Enable
RE — Receiver Enable
SBK — Send Break
If parity is enabled, this bit determines even or odd parity for both the
receiver and the transmitter.
OR does not generate an interrupt request in MI Bus mode.
When an MI Bus wire is held low for eight or more time slots an
internal circuit on any slave device connected to the bus may reset or
preset the device with default values.
0 = MI Bus transmit pin functions normally.
1 = MI Bus transmit pin will send inverted data.
0 = RDRF interrupt disabled.
1 = MI Bus interrupt will be requested whenever the RDRF status
0 = Transmitter disabled.
1 = MI Bus transmit logic is enabled and the TxD0 pin (Port S bit 1)
0 = Receiver disabled.
1 = Port pin dedicated to the MI Bus; the receiver is enabled by a
0 = No action.
1 = MI transmit line is set low for 20 time slots.
RIE
5
0
flag is set.
is dedicated to the transmitter.
pull sync and is inhibited during a push field.
Freescale Interconnect Bus
4
0
TE
3
0
RE
2
0
MC68HC912D60A — Rev. 3.1
1
0
Freescale Semiconductor
Bit 0
SBK
0
$00C3

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