XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 72

IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112

XC68HC12A0CPV8

Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC68HC12A0CPV8

Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Modes and Resource Mapping
5.3.1 Normal Operating Modes
Technical Data
72
BKGD
1
1
1
1
0
0
0
0
The states of the BKGD, MODB, and MODA pins are latched into these
bits on the rising edge of the reset signal.
There are two basic types of operating modes:
For operation above 105°C, the MC68HC912D60A (M temperature
range product only) is limited to single chip modes of operation.
A system development and debug feature, background debug mode
(BDM), is available in all modes. In special single-chip mode, BDM is
active immediately after reset.
These modes provide three operating configurations. Background
debugging is available in all three modes, but must first be enabled for
some operations by means of a BDM background command, then
activated.
MODB
0
0
1
1
0
0
1
1
Operating Modes and Resource Mapping
Normal modes — some registers and bits are protected
against accidental changes.
Special modes — allow greater access to protected control
registers and bits for special purposes such as testing and
emulation.
MODA
0
1
0
1
0
1
0
1
Table 5-1. Mode Selection
Special Expanded Narrow
Normal Expanded Narrow
Normal Expanded Wide
Special Expanded Wide
Reserved (Forced to
Normal Single Chip
Special Single Chip
Special Peripheral
Peripheral)
Mode
ADDR/DATA
ADDR/DATA
ADDR/DATA
ADDR/DATA
ADDR/DATA
MC68HC912D60A — Rev. 3.1
G.P. I/O
G.P. I/O
Port A
Freescale Semiconductor
ADDR/DATA
ADDR/DATA
ADDR/DATA
G.P. I/O
G.P. I/O
Port B
ADDR
ADDR

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