XC68HC12A0CPV8 Freescale Semiconductor, XC68HC12A0CPV8 Datasheet - Page 289

IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112

XC68HC12A0CPV8

Manufacturer Part Number
XC68HC12A0CPV8
Description
IC, 16BIT MCU, 68HC12, 8MHZ, TQFP-112
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XC68HC12A0CPV8

Controller Family/series
68HC12
No. Of I/o's
68
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
1
Core Size
16 Bit
Program Memory Size
60KB
Peripherals
ADC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Technical Data — MC68HC912D60A
16.1 Contents
16.2 Introduction
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
16.2
16.3
16.4
16.5
16.6
16.7
16.8
The Freescale Interconnect Bus (MI Bus) is a serial communications
protocol which supports distributed real-time control efficiently and with a
high degree of noise immunity, at a typical data transfer bit rate of 20kHz.
The MI Bus is suitable for medium speed networks requiring very low cost
multiplex wiring; only one wire is required to connect to slave devices.
The MI Bus uses a push-pull sequence to transfer data. The master
device, which in this case is the MC68HC912D60A, sends a push field to
the slave devices connected to the bus. The push field contains data plus
an address that is recognized by one of the slaves. The slave addressed
returns data which the master pulls from the MI Bus over the same wire.
Specific details of the message format are covered later in this section.
The MCU (master) can take the bus at any time, with a start bit that
1. Related information on Freescale’s MI Bus is contained in the following Freescale publications:
EB409/D — The MI Bus and Product family for Multiplexing Systems
AN475/D — Single Wire MI Bus Controlling Stepper Motors
BR477/D — Smart Mover – Stepper Motors with Integrated Serial Bus Controller
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
Push-pull sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
Biphase coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291
MI Bus clock rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Message validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 292
Interfacing to MI Bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294
SCI0/MI Bus registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296
Section 16. Freescale Interconnect Bus
Freescale Interconnect Bus
Technical Data
289
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