AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 2

• Manufacturer Part Number: AD9547/PCBZ
• Description: Clock Generator/Synchronizer Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9547/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9547
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9547
• Primary Attributes: 2 Differential or 4 Single Ended Inputs
• Secondary Attributes: CMOS, LVPECL & LVDS Compatible
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9547
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings .......................................................... 14
Pin Configuration and Function Descriptions ........................... 15
Typical Performance Characteristics ........................................... 18
Input/Output Termination Recommendations .......................... 23
Getting Started ................................................................................ 24
Theory of Operation ...................................................................... 26
Supply Voltage ............................................................................... 4
Supply Current .............................................................................. 4
Power Dissipation ......................................................................... 4
Logic Inputs (M0 to M7, RESET) ............................................... 5
Logic Outputs (M0 to M7, IRQ) ................................................ 5
System Clock Inputs (SYSCLKP, SYSCLKN)............................ 5
Distribution Clock Inputs (CLKINP, CLKINN) ...................... 6
Reference Inputs (REFA/REFAA, REFB/REFBB) .................... 7
Reference Monitors ...................................................................... 7
Reference Switchover Specifications .......................................... 8
Distribution Clock Outputs (OUT0, OUT1) ........................... 8
DAC Output Characteristics (DACOUTP, DACOUTN) ....... 9
Time Duration of Digital Functions ........................................ 10
Digital PLL .................................................................................. 10
Digital PLL Lock Detection ...................................................... 10
Holdover Specifications ............................................................. 10
Serial Port Specifications—SPI Mode ...................................... 11
Serial Port Specifications—I
Jitter Generation ......................................................................... 13
ESD Caution ................................................................................ 14
Power-On Reset .......................................................................... 24
Initial M0 to M7 Pin Programming ......................................... 24
Device Register Programming .................................................. 24
Overview ...................................................................................... 26
Reference Clock Inputs .............................................................. 27
Reference Monitors .................................................................... 27
Reference Profiles ....................................................................... 28
Reference Switchover ................................................................. 30
2
C Mode ...................................... 12
Rev. B | Page 2 of 104
Status and Control .......................................................................... 44
Serial Control Port ......................................................................... 50
I/O Programming Registers .......................................................... 57
Register Map ................................................................................... 58
Register Bit Descriptions ............................................................... 67
Applications Information .............................................................. 98
Digital Phase-Locked Loop (DPLL) Core ............................... 32
Direct Digital Synthesizer (DDS) ............................................. 34
Tuning Word Processing ........................................................... 35
Loop Control State Machine ..................................................... 36
System Clock Inputs ................................................................... 37
SYSCLK PLL Multiplier ............................................................. 38
Clock Distribution ..................................................................... 40
Multifunction Pins (M0 to M7) ............................................... 44
IRQ Pin ........................................................................................ 45
Watchdog Timer ......................................................................... 45
EEPROM ..................................................................................... 46
SPI/I
SPI Serial Port Operation .......................................................... 50
I2C Serial Port Operation .......................................................... 54
Buffered/Active Registers .......................................................... 57
Autoclearing Registers ............................................................... 57
Register Access Restrictions ...................................................... 57
Serial Port Configuration and Part Identification (Register
0x0000 to Register 0x0005) ....................................................... 67
System Clock (SYSCLK) (Register 0x0100 to Register 0x0108)
....................................................................................................... 68
General Configuration (Register 0x0200 to Register 0x0214)
....................................................................................................... 69
DPLL Configuration (Register 0x0300 to Register 0x031B) 72
Clock Distribution Output Configuration (Register 0x0400 to
Register 0x0417) ......................................................................... 74
Reference Input Configuration (Register 0x0500 to Register
0x0507) ......................................................................................... 76
Profile Registers (Register 0x0600 to Register 0x07FF) ........ 78
Operational Controls (Register 0x0A00 to Register 0x0A10)
....................................................................................................... 88
Status Readback (Register 0x0D00 to Register 0x0D19) ...... 92
Nonvolatile Memory (EEPROM) Control (Register 0x0E00 to
Register 0x0E03) ......................................................................... 94
EEPROM Storage Sequence (Register 0x0E10 to Register
0x0E3F) ........................................................................................ 95
2
C Port Selection ................................................................ 50