AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 98

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9547
APPLICATIONS INFORMATION
POWER SUPPLY PARTITIONS
The AD9547 features multiple power supplies, and their power
consumption varies with the AD9547 configuration. This section
provides information about which power supplies can be grouped
together and how the power consumption of each block varies
with frequency.
The numbers quoted in this section are for comparison only. Refer
to the Specifications section for exact numbers. With each group,
bypass capacitors of 1 μF in parallel with 10 μF should be used.
Upon applying power to the device, internal circuitry monitors
the 1.8 V digital core supply and the 3.3 V digital I/O supply.
When these supplies cross the desired threshold level, the device
generates an internal 10 μs reset pulse. This pulse does not appear
on the RESET pin.
3.3 V Supplies
The 3.3 V supply domain consists of two main partitions: digital
(DVDD3) and analog (AVDD3). These two supply domains
must be kept separate.
Furthermore, the AVDD3 consists of two subdomains: the clock
distribution output domain (Pin 25, Pin 31) and the rest of the
AVDD3 supply connections. Generally, the ADD3 supply domains
can be joined together. However, if an application requires 1.8 V
CMOS driver operation in the clock distribution output block,
provide one 1.8 V supply domain to power the clock distribution
output block. Each output driver has a dedicated supply pin, as
shown in Table 158.
Table 158. Output Driver Supply Pins
Output Driver
OUT0
OUT1
Table 159. Thermal Parameters for the AD9547 64-Lead LFCSP Package
Symbol
θ
θ
θ
θ
θ
Ψ
1
2
The exposed pad on the bottom of the package must be soldered to ground to achieve the specified thermal performance.
Results are from simulations. The PCB is a JEDEC multilayer type. Thermal performance for actual applications requires careful inspection of the conditions in the
application to determine whether they are similar to those assumed in these calculations.
JA
JMA
JMA
JB
JC
JT
Thermal Characteristic Using a JEDEC51-7 Plus JEDEC51-5 2S2P Test Board
Junction-to-ambient thermal resistance, 0.0 m/sec air flow per JEDEC JESD51-2 (still air)
Junction-to-ambient thermal resistance, 1.0 m/sec air flow per JEDEC JESD51-6 (moving air)
Junction-to-ambient thermal resistance, 2.5 m/sec air flow per JEDEC JESD51-6 (moving air)
Junction-to-board thermal resistance, per JEDEC JESD51-8 (still air)
Junction-to-case thermal resistance
Junction-to-top-of-package characterization parameter, 0 m/sec airflow per JEDEC JESD51-2 (still air)
Supply Pin
25
31
Rev. B | Page 98 of 104
1.8 V Supplies
The 1.8 V supply domain consists of two main partitions: digital
(DVDD) and analog (AVDD). These two supply domains must
be kept separate.
THERMAL PERFORMANCE
The AD9547 is specified for a case temperature (T
that T
following equation to determine the junction temperature on
the application PCB:
where:
T
T
by the customer at the top center of the package.
Ψ
PD is the power dissipation (see the Power Dissipation section).
Values of θ
considerations. θ
using the following equation:
where T
Values of θ
design considerations when an external heat sink is required.
Values of θ
design considerations.
J
CASE
JT
is the junction temperature in degrees Celsius (°C).
is the value that is indicated in Table 159.
T
T
is the case temperature in degrees Celsius (°C) measured
CASE
J
J
= T
= T
A
is not exceeded, an airflow source can be used. Use the
is the ambient temperature in degrees Celsius (°C).
JA
CASE
A
JC
JB
are provided for package comparison and PCB design
+ (θ
are provided for package comparison and PCB
are provided for package comparison and PCB
+ (Ψ
JA
1
JA
can be used for a first-order approximation of T
× PD)
JT
× PD)
CASE
Value
21.7
18.9
16.9
11.3
1.2
0.1
). To ensure
2
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
J

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