AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 69

• Manufacturer Part Number: AD9547/PCBZ
• Description: Clock Generator/Synchronizer Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9547/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9547
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9547
• Primary Attributes: 2 Differential or 4 Single Ended Inputs
• Secondary Attributes: CMOS, LVPECL & LVDS Compatible
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 46. Nominal System Clock (SYSCLK) Period
Address
0x0103
0x0104
0x0105
1
Table 47. System Clock Stability Period
Address
0x0106
0x0107
0x0108
1
GENERAL CONFIGURATION (REGISTER 0x0200 TO REGISTER 0x0214)
Register 0x0200 to Register 0x0207—Multifunction Pin Control (M0 to M7)
Table 48. Multifunction Pin (M0 to M7) Control
Address
0x0200
0x0201
0x0202
0x0203
0x0204
0x0205
0x0206
0x0207
1
Table 49. IRQ Pin Output Mode
Address
0x0208
Units are femtoseconds (fs). The default value is 0x0F424 = 1,000,000 (1 ns) and implies a system clock frequency of 1 GHz.
Units are milliseconds (ms). The default value is 0x00001 = 1 (1 ms).
The default setting for all the multifunction pins is as an unused control input pin.
Bit
[7:0]
[7:0]
[7:5]
[4:0]
Bit
[7:0]
[7:0]
[7:4]
[3:0]
Bit
7
[6:0]
7
[6:0]
7
[6:0]
7
[6:0]
7
[6:0]
7
[6:0]
7
[6:0]
7
[6:0]
Bit
[7:2]
[1:0]
Bit Name
Nominal SYSCLK period
(expressed in fs)
Unused
Nominal SYSCLK period
Bit Name
M0 in/out
M0 function
M1 in/out
M1 function
M2 in/out
M2 function
M3 in/out
M3 function
M4 in/out
M4 function
M5 in/out
M5 function
M6 in/out
M6 function
M7 in/out
M7 function
Bit Name
SYSCLK stability period
(expressed in ms)
Unused
SYSCLK stability period
Bit Name
Unused
IRQ pin output mode
1
System clock period, Bits[7:0].
System clock period, Bits[15:8].
Unused.
System clock period, Bits[20:16].
System clock stability period, Bits[15:8] (default = 0x00).
Unused.
System clock stability period, Bits[19:16] (default = 0x0)
In/out control for the M0 pin.
0 (default) = input (control pin).
1 = output (status pin).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M1 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M2 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M3 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M4 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M5 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M6 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
In/out control for the M7 pin (same as M0).
See Table 24 and Table 25 (default = 0xb0000000).
Unused.
Description
Description
System clock stability period, Bits[7:0] (default = 0x01).
(default period = 0x00001, or 1 ms).
Description
Description
Select the output mode of the IRQ pin.
00 (default) = NMOS, open drain (requires an external pull-up resistor).
01 = PMOS, open drain (requires an external pull-down resistor).
10 = CMOS, active high.
11 = CMOS, active low.
1
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Rev. B | Page 69 of 104
AD9547