AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 96

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9547
Table 150. EEPROM Storage Sequence for Clock Distribution Settings
Address
0x0E1B
0x0E1C
0x0E1D
0x0E1E
Table 151. EEPROM Storage Sequence for Reference Input Settings
Address
0x0E1F
0x0E20
0x0E21
Table 152. EEPROM Storage Sequence for Profile 0 and Profile 1 Settings
Address
0x0E22
0x0E23
0x0E24
Table 153. EEPROM Storage Sequence for Profile 2 and Profile 3 Settings
Address
0x0E25
0x0E26
0x0E27
Bit
[7:0]
[7:0]
[7:0]
[7:0]
Bit
[7:0]
[7:0]
[7:0]
Bit
[7:0]
[7:0]
[7:0]
Bit
[7:0]
[7:0]
[7:0]
Bit Name
Clock distribution
Clock distribution
I/O update
Bit Name
Reference inputs
Reference inputs
Bit Name
Profile 0 and Profile 1
Profile 0 and Profile 1
Bit Name
Profile 2 and Profile 3
Profile 2 and Profile 3
Description
The default value of this register is 0x19, which the controller interprets as a data instruction. Its
decimal value is 25; this tells the controller to transfer 26 bytes of data (25 + 1) beginning at the
address specified by the next two bytes. The controller stores 0x19 in the EEPROM and
increments the EEPROM address pointer.
The default value of these two registers is 0x0400. Note that Register 0x0E1C and Register 0x0E1D
are the most significant and least significant bytes of the target address, respectively. Because
the previous register contains a data instruction, these two registers define a starting address
(in this case, 0x0400). The controller stores 0x0400 in the EEPROM and increments the EEPROM
pointer by 2. It then transfers 26 bytes from the register map (beginning at Address 0x0400) to
the EEPROM and increments the EEPROM address pointer by 27 (26 data bytes and one checksum
byte). The 26 bytes transferred correspond to the clock distribution parameters in the register map.
The default value of this register is 0x80, which the controller interprets as an I/O update
instruction. The controller stores 0x80 in the EEPROM and increments the EEPROM address pointer.
Description
The default value of this register is 0x07, which the controller interprets as a data instruction. Its
decimal value is 7, which tells the controller to transfer eight bytes of data (7 + 1), beginning at the
address specified by the next two bytes. The controller stores 0x07 in the EEPROM and increments
the EEPROM address pointer.
The default value of these two registers is 0x0500. Note that Register 0x0E20 and Register 0x0E21
are the most significant and least significant bytes of the target address, respectively. Because
the previous register contains a data instruction, these two registers define a starting address
(in this case, 0x0500). The controller stores 0x0500 in the EEPROM and increments the EEPROM
pointer by 2. It then transfers eight bytes from the register map (beginning at Address 0x0500) to the
EEPROM and increments the EEPROM address pointer by nine (eight data bytes and one checksum
byte). The eight bytes transferred correspond to the reference inputs parameters in the register map.
Description
The default value of this register is 0x63, which the controller interprets as a data instruction. Its
decimal value is 99, which tells the controller to transfer 100 bytes of data (99 + 1), beginning at the
address specified by the next two bytes. The controller stores 0x63 in the EEPROM and
increments the EEPROM address pointer.
The default value of these two registers is 0x0600. Note that Register 0x0E23 and Register 0x0E24
are the most significant and least significant bytes of the target address, respectively. Because
the previous register contains a data instruction, these two registers define a starting address
(in this case, 0x0600). The controller stores 0x0600 in the EEPROM and increments the EEPROM
pointer by 2. It then transfers 100 bytes from the register map (beginning at Address 0x0600) to
the EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and one checksum
byte). The 99 bytes transferred correspond to the Profile 0 and Profile 1 parameters in the
register map.
Description
The default value of this register is 0x63, which the controller interprets as a data instruction. Its
decimal value is 99, which tells the controller to transfer 100 bytes of data (99 + 1), beginning at
the address specified by the next two bytes. The controller stores 0x63 in the EEPROM and
increments the EEPROM address pointer.
The default value of these two registers is 0x0680. Note that Register (0x0E26 and Register 0x0E27
are the most significant and least significant bytes of the target address, respectively. Because
the previous register contains a data instruction, these two registers define a starting address
(in this case, 0x0680). The controller stores 0x0680 in the EEPROM and increments the EEPROM
pointer by 2. It then transfers 100 bytes from the register map (beginning at Address 0x0680) to
the EEPROM and increments the EEPROM address pointer by 101 (100 data bytes and one checksum
byte). The 99 bytes transferred correspond to the Profile 2 and Profile 3 parameters in the
register map.
Rev. B | Page 96 of 104

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