AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 53

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
SCLK
Table 33. Serial Control Port Timing
Parameter
t
t
t
t
t
t
t
t
SDIO
DS
DH
CLK
S
C
HIGH
LOW
DV
CS
DON'T CARE
DON'T CARE
A0 A1 A2 A3
SCLK
SDIO
CS
Description
Setup time between data and the rising edge of SCLK
Hold time between data and the rising edge of SCLK
Period of the clock
Setup time between the CS falling edge and SCLK rising edge (start of the communication cycle)
Setup time between the SCLK rising edge and CS rising edge (end of the communication cycle)
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
SCLK to valid SDIO and SDO (see Figure 54)
A4
16-BIT INSTRUCTION HEADER
A5 A6 A7 A8 A9 A10 A11 A12
Figure 55. Serial Control Port Write—LSB First, 16-Bit Instruction, Two Bytes of Data
t
t
DS
S
SCLK
SDIO
SDO
CS
BIT N
t
HIGH
t
DH
Figure 56. Serial Control Port Timing—Write
Figure 54. Serial Control Port Timing—Read
DATA BIT N
t
CLK
W0
Rev. B | Page 53 of 104
t
t
DV
LOW
W1
R/W
BIT N + 1
D0
DATA BIT N – 1
D1
REGISTER (N) DATA
D2 D3 D4
D5 D6 D7 D0
D1 D2
REGISTER (N + 1) DATA
D3 D4 D5
t
C
D6
D7
DON'T CARE
AD9547
DON'T CARE

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