AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 91

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 127. Incremental Phase Offset Control
Address
0x0A0C
Table 128. Reference Profile Selection State Machine Startup
Address
0x0A0D
1
Register 0x0A0E to Register 0x0A10—Reference Validation Override Controls
Table 129. Force Validation Timeout
Address
0x0A0E
1
Table 130. Reference Monitor Override
Address
0x0A0F
1
Table 131. Reference Monitor Bypass
Address
0x0A10
1
All bits in this register are autoclearing.
All bits in this register are autoclearing.
All bits in this register are autoclearing.
All bits in this register are autoclearing.
Bit
[7:3]
2
1
0
Bit
[7:4]
3
2
1
0
Bit
[7:4]
3
2
1
0
Bit
[7:4]
3
2
1
0
Bit
[7:4]
3
2
1
0
Bit Name
Unused
Reset phase offset
Decrement phase offset
Increment phase offset
Unused
Detect BB
Detect B
Detect AA
Detect A
Bit Name
Unused
Force Timeout BB
Force Timeout B
Force Timeout AA
Force Timeout A
Bit Name
Unused
Ref Mon Override BB
Ref Mon Override B
Ref Mon Override AA
Ref Mon Override A
Bit Name
Unused
Ref Mon Bypass BB
Ref Mon Bypass B
Ref Mon Bypass AA
Ref Mon Bypass A
Bit Name
1
1
1
Description
Unused.
Resets the incremental phase offset to 0. This is an autoclearing bit.
Decrements the incremental phase offset by the amount specified in the incremental
phase lock offset step size register (Register 0x0314 to Register 0x0315).
This is an autoclearing bit.
Increments the incremental phase offset by the amount specified in the incremental phase
lock offset step size register (Register 0x0314 to Register 0x0315).
This is an autoclearing bit.
Description
Unused.
Setting this bit starts the profile selection state machine for Input Reference BB.
Setting this bit starts the profile selection state machine for Input Reference B.
Setting this bit starts the profile selection state machine for Input Reference AA.
Setting this bit starts the profile selection state machine for Input Reference A.
Description
Unused.
Setting this bit emulates timeout of the validation timer for Reference BB.
This is an autoclearing bit.
Setting this bit emulates timeout of the validation timer for Reference B.
This is an autoclearing bit.
Setting this bit emulates timeout of the validation timer for Reference AA.
This is an autoclearing bit.
Setting this bit emulates timeout of the validation timer for Reference A.
This is an autoclearing bit.
Description
Unused.
Overrides the reference monitor REF fault signal for Reference BB (default = 0, not overridden).
Overrides the reference monitor REF fault signal for Reference B (default = 0, not overridden).
Overrides the reference monitor REF fault signal for Reference AA (default = 0, not overridden).
Overrides the reference monitor REF fault signal for Reference A (default = 0, not overridden).
Description
Unused.
Bypasses the reference monitor for Reference BB (default = 0, not bypassed).
Bypasses the reference monitor for Reference B (default = 0, not bypassed).
Bypasses the reference monitor for Reference AA (default = 0, not bypassed).
Bypasses the reference monitor for Reference A (default = 0, not bypassed).
Rev. B | Page 91 of 104
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AD9547

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