AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 47

• Manufacturer Part Number: AD9547/PCBZ
• Description: Clock Generator/Synchronizer Evaluation Board
• Manufacturer: Analog Devices Inc

Specifications of AD9547/PCBZ

• Silicon Manufacturer: Analog Devices
• Application Sub Type: Network Clock Generator/Synchronizer
• Kit Application Type: Clock & Timing
• Silicon Core Number: AD9547
• Main Purpose: Timing, Clock Generator
• Embedded: No
• Utilized Ic / Part: AD9547
• Primary Attributes: 2 Differential or 4 Single Ended Inputs
• Secondary Attributes: CMOS, LVPECL & LVDS Compatible
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 27. EEPROM Controller Instruction Set
Instruction
Value (Hex)
0x00 to 0x7F
0x80
0xA0
0xA1
0xB0 to 0xCF
0xFE
0xFF
EEPROM Upload
To upload data to the EEPROM, the user must first ensure that
the write enable bit (Register 0x0E00, Bit 0) is set. Then, on set-
ting the autoclearing save to EEPROM bit (Register 0x0E02, Bit 0),
the controller initiates the EEPROM data storage process.
Uploading EEPROM data requires that the user first write an
instruction sequence into the scratch pad registers. During the
upload process, the controller reads the scratch pad data byte by
byte, starting at Register 0x0E10 and incrementing the scratch
pad address pointer as it goes, until it reaches a pause or end
instruction.
As the controller reads the scratch pad data, it transfers the
data from the scratch pad to the EEPROM (byte by byte) and
increments the EEPROM address pointer accordingly, unless it
encounters a data instruction. A data instruction tells the con-
troller to transfer data from the device settings portion of the
register map to the EEPROM. The number of bytes to transfer
is encoded within the data instruction, and the starting address
for the transfer appears in the next two bytes in the scratch pad.
When the controller encounters a data instruction, it stores the
instruction in the EEPROM, increments the EEPROM address
pointer, decodes the number of bytes to be transferred, and
increments the scratch pad address pointer. Then it retrieves
the next two bytes from the scratch pad (the target address) and
increments the scratch pad address pointer by 2. Next, the con-
troller transfers the specified number of bytes from the register
map (beginning at the target address) to the EEPROM.
I/O update
Calibrate
Distribution sync
Pause
End
Instruction Type
Data
Condition
Bytes
Required
3
1
1
1
1
1
1
Description
A data instruction tells the controller to transfer data to or from the device settings
part of the register map. A data instruction requires two additional bytes that,
together, indicate a starting address in the register map. Encoded in the data
instruction is the number of bytes to transfer, which is one more than the
instruction value.
When the controller encounters this instruction while downloading from the
EEPROM, it issues a soft I/O update (see Register 0x0005 in Table 42).
When the controller encounters this instruction while downloading from the EEPROM,
it initiates a system clock calibration sequence (see Register 0x0A02 in Table 120).
When the controller encounters this instruction while downloading from the
EEPROM, it issues a sync pulse to the output distribution synchronization (see
Register 0x0A02 in Table 120).
0xB1 to 0xCF are condition instructions and correspond to Condition 1 to Condition 31,
respectively. 0xB0 is the null condition instruction. See the EEPROM Conditional
Processing section for details.
When the controller encounters this instruction in the scratch pad while uploading
to the EEPROM, it resets the scratch pad address pointer and holds the EEPROM
address pointer at its last value. This allows storage of more than one instruction
sequence in the EEPROM. Note that the controller does not copy this instruction to
the EEPROM during upload.
When the controller encounters this instruction in the scratch pad while uploading
to the EEPROM, it resets both the scratch pad address pointer and the EEPROM
address pointer and then enters an idle state.
When the controller encounters this instruction while downloading from the
EEPROM, it resets the EEPROM address pointer and then enters an idle state.
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When it completes the data transfer, the controller stores an extra
byte in the EEPROM to serve as a checksum for the transferred
block of data. To account for the checksum byte, the controller
increments the EEPROM address pointer by one more than the
number of bytes transferred. Note that, when the controller
transfers data associated with an active register, it actually
transfers the buffered contents of the register (see the
Buffered/Active Registers section for details on the difference
between buffered and active registers). This allows for the
transfer of nonzero autoclearing register contents.
Note that conditional processing does not occur during an
upload sequence (see the EEPROM Conditional Processing
section).
EEPROM Download
An EEPROM download results in a transfer of data from the
EEPROM to the device register map. To download data, the user
sets the autoclearing load from EEPROM bit (Register 0x0E03,
Bit 1). This commands the controller to initiate the EEPROM
download process. During download, the controller reads the
EEPROM data byte by byte, incrementing the EEPROM address
pointer as it goes, until it reaches an end instruction. As the con-
troller reads the EEPROM data, it executes the stored instructions,
which includes transferring stored data to the device settings
portion of the register map whenever it encounters a data
instruction.
Note that conditional processing is applicable only when down-
loading (see the EEPROM Conditional Processing section).
AD9547