AD9547/PCBZ Analog Devices Inc, AD9547/PCBZ Datasheet - Page 6

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AD9547/PCBZ

Manufacturer Part Number
AD9547/PCBZ
Description
Clock Generator/Synchronizer Evaluation Board
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9547/PCBZ

Silicon Manufacturer
Analog Devices
Application Sub Type
Network Clock Generator/Synchronizer
Kit Application Type
Clock & Timing
Silicon Core Number
AD9547
Main Purpose
Timing, Clock Generator
Embedded
No
Utilized Ic / Part
AD9547
Primary Attributes
2 Differential or 4 Single Ended Inputs
Secondary Attributes
CMOS, LVPECL & LVDS Compatible
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9547
Parameter
DISTRIBUTION CLOCK INPUTS (CLKINP, CLKINN)
Table 7.
Parameter
INPUT FREQUENCY RANGE
MINIMUM SLEW RATE
COMMON-MODE VOLTAGE
DIFFERENTIAL INPUT VOLTAGE SENSITIVITY
DIFFERENTIAL INPUT POWER SENSITIVITY
INPUT CAPACITANCE
INPUT RESISTANCE
Low Frequency Path
Crystal Resonator Path
Input Frequency Range
Minimum Input Slew Rate
Common-Mode Voltage
Differential Input Voltage Sensitivity
Input Capacitance
Input Resistance
Crystal Resonator Frequency Range
Maximum Crystal Motional
Resistance
Min
3.5
50
100
10
Min
62.5
75
100
−15
Typ
700
3
5
Typ
1.2
3
4
Rev. B | Page 6 of 104
Max
100
50
100
Max
500
Unit
MHz
V/μs
mV
mV p-p
dBm
pF
Unit
MHz
V/μs
V
mV p-p
pF
MHz
Ω
Internally generated
Each pin has a 2.5 kΩ internal dc bias resistance
Test Conditions/Comments
Minimum limit imposed for jitter performance
Internally generated
This is the minimum voltage required across the pins to
ensure switching between logic states; the
instantaneous voltage on either pin must not exceed
the supply rails; ac ground the unused input to
accommodate single-ended operation
Fundamental mode, AT cut
See the System Clock Inputs section for recommendations
Test Conditions/Comments
Minimum limit imposed for jitter performance
Capacitive coupling required; ac ground the unused
input to accommodate single-ended operation; the
instantaneous voltage on either pin must not exceed
the supply rails
Same as voltage sensitivity but specified as power into a
50 Ω load
Single-ended, each pin

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