EPM2210GF256I5N Altera, EPM2210GF256I5N Datasheet - Page 13

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EPM2210GF256I5N

Manufacturer Part Number
EPM2210GF256I5N
Description
MAX II
Manufacturer
Altera
Datasheet

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0
Logic Array
Blocks
Figure 2–3. MAX II LAB Structure
Note to
(1)
Altera Corporation
March 2008
Fast I/O connection
to IOE (1)
DirectLink
interconnect from
adjacent LAB
or IOE
DirectLink
interconnect to
adjacent LAB
or IOE
Only from LABs adjacent to IOEs.
Figure
2–3:
Logic Element
Each LAB consists of 10 LEs, LE carry chains, LAB control signals, a local
interconnect, a look-up table (LUT) chain, and register chain connection
lines. There are 26 possible unique inputs into an LAB, with an additional
10 local feedback input lines fed by LE outputs in the same LAB. The local
interconnect transfers signals between LEs in the same LAB. LUT chain
connections transfer the output of one LE’s LUT to the adjacent LE for fast
sequential LUT connections within the same LAB. Register chain
connections transfer the output of one LE’s register to the adjacent LE’s
register within an LAB. The Quartus
within an LAB or adjacent LABs, allowing the use of local, LUT chain,
and register chain connections for performance and area efficiency.
Figure 2–3
LE0
LE1
LE2
LE3
LE4
LE5
LE6
LE7
LE8
LE9
LAB
shows the MAX II LAB.
Local Interconnect
Row Interconnect
®
II software places associated logic
MAX II Device Handbook, Volume 1
MAX II Architecture
Column Interconnect
Fast I/O connection
to IOE (1)
DirectLink
interconnect from
adjacent LAB
or IOE
DirectLink
interconnect to
adjacent LAB
or IOE
2–5

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